Paper
2 June 2003 Characterization of line-edge roughness in resist patterns and estimations of its effect on device performance
Atsuko Yamaguchi, Ryuta Tsuchiya, Hiroshi Fukuda, Osamu Komuro, Hiroki Kawada, Takashi Iizumi
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Abstract
A guideline for evaluating LER and total procedure to estimate effects of measured LER on device performance were proposed. Spatial-frequency distributions of LER in various resist materials were investigated and general characteristics of spatial-frequency distribution of LER were obtained. Measurement parameters for accurate LER measurement can be calculated according to the guideline. Measured line-width distribution was used for predicting degradation and variation in MOS transistor performance using the 2D device simulation. Effect of long-period component of LER was clarified as well as short-period component.
© (2003) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Atsuko Yamaguchi, Ryuta Tsuchiya, Hiroshi Fukuda, Osamu Komuro, Hiroki Kawada, and Takashi Iizumi "Characterization of line-edge roughness in resist patterns and estimations of its effect on device performance", Proc. SPIE 5038, Metrology, Inspection, and Process Control for Microlithography XVII, (2 June 2003); https://doi.org/10.1117/12.483519
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Cited by 41 scholarly publications and 2 patents.
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KEYWORDS
Line edge roughness

Transistors

Inspection

Scanning electron microscopy

Device simulation

Statistical analysis

Dry etching

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