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1. A highly efficient reconfigurable architecture for an UTRA-TDD mobile station receiver
Vejanovski, R.; Stojcevski, A.; Singh, J.; Faulkner, M.; Zayegh, A.;
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Volume 2,  25-28 May 2003 Page(s):II-45 - II-48 vol.2
Abstract:

A novel reconfigurable architecture has been proposed for a mobile terminal receiver that can reduce power dissipation dependant on adjacent channel interference. The proposed design can automatically scale the number of filter coefficients and word length respectively by monitoring the in-band and out-of-band powers. The new architecture performance was evaluated in a simulation UTRA-TDD environment because of the large near far problem caused by adjacent channel interference from adjacent mobiles and base stations. The UTRA-TDD downlink mode was examined statistically and results show that the reconfigurable architectures can save a maximum of 75% to 90% power dissipation respectively when compared to a fixed filter length of 57 and ADC word length of 16 bits. This will prolong talk and standby time in a mobile terminal. The average number of taps and bits were calculated to be 15 and 10 respectively, for an outage of 97%.
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