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Low-voltage BiCMOS four-quadrant multiplier using triode-region transistors
Shen-Iuan Liu; Jiin-Long Lee; Cheng-Chieh Chang;
Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on
Volume 46,
Issue 7,
July 1999
Page(s):861
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864
Abstract:
A low-voltage BiCMOS four-quadrant multiplier using triode-region transistors is presented, this circuit has been fabricated in a 1.0 μm BiCMOS process. Experimental results show that for a power supply of ±1.5 V, the linear range is over ±0.6 V with the linearity error of less than 2%. The total harmonic distortion is less than 2% with an input range up to ±0.6 V. The measured -3-dB bandwidth of this proposed BiCMOS multiplier is about 10 MHz. This circuit is expected to be useful in low-voltage analog signal-processing applications
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