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1. A parallel video converter for displaying 4:3 images on 16:9 HDTV receivers
Shih-Chang Hsia; Bin-Da Liu; Jar-Ferr Yang; Chien-Hsiu Huang;
Circuits and Systems for Video Technology, IEEE Transactions on
Volume 6,  Issue 6,  Dec. 1996 Page(s):695 - 699
Abstract:

The 16/9 widescreen TV is becoming popular in the marketplace; however, its aspect ratio is not compatible with the conventional 4/3 SDTV program. We propose a nonuniform conversion to efficiently display 4/3 SDTV programs on a 16/9 high-definition television (HDTV) monitor, for real time HDTV receivers, a parallel video converter is also proposed using nonuniform interpolation. To trade off complexity and performance, we only use one field-memory and one line-buffer for motion adaptation to interpolate the pixels, which can be finished by the parallel computation kernel in one clock cycle. In order to combine parallel computation, the memory-slice method is employed, which is efficiently controlled by a state machine for nonuniform interpolation. With parallel conversion, a high-speed video converter can be achieved for advanced HDTV receivers
Abstract | Full Text: PDF(608 KB)    IEEE JNL
 
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