Mapping of Electrostatic Potential in Deep Submicron CMOS Devices by Electron Holography

M. A. Gribelyuk, M. R. McCartney, Jing Li, C. S. Murthy, P. Ronsheim, B. Doris, J. S. McMurray, S. Hegde, and David J. Smith
Phys. Rev. Lett. 89, 025502 – Published 19 June 2002
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Abstract

Quantitative two-dimensional maps of electrostatic potential in device structures are obtained using off-axis electron holography with a spatial resolution of 6 nm and a sensitivity of 0.17 V. Estimates of junction depth and variation in electrostatic potential obtained by electron holography, process simulation, and secondary ion mass spectroscopy show close agreement. Measurement artifacts due to sample charging and surface “dead layers” do not need to be considered provided that proper care is taken with sample preparation. The results demonstrate that electron holography could become an effective method for quantitative 2D analysis of dopant diffusion in deep-submicron devices.

  • Received 31 October 2001

DOI:https://doi.org/10.1103/PhysRevLett.89.025502

©2002 American Physical Society

Authors & Affiliations

M. A. Gribelyuk1, M. R. McCartney2, Jing Li3, C. S. Murthy1, P. Ronsheim1, B. Doris1, J. S. McMurray1, S. Hegde4,5, and David J. Smith2,3

  • 1IBM Microelectronics Division, Semiconductor Research and Development Center, Hopewell Junction, New York 12533
  • 2Center for Solid State Science, Arizona State University, Tempe, Arizona 85287-1704
  • 3Department of Physics and Astronomy, Arizona State University, Tempe, Arizona 85287-1504
  • 4IBM Research Division, T. J. Watson Research Center, Yorktown Heights, New York 10598
  • 5DRAM Development Alliance IBM/Infineon, Semiconductor Research and Development Center, Hopewell Junction, New York 12533

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Vol. 89, Iss. 2 — 8 July 2002

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