We present a detailed analysis of the impact on quantum modular exponentiation of architectural features and possible concurrent gate execution. Various arithmetic algorithms are evaluated for execution time, potential concurrency, and space trade-offs. We find that to exponentiate an $n\text{−}\text{bit}$ number, for storage space $100n$ (20 times the minimum $5n$), we can execute modular exponentiation 200–700 times faster than optimized versions of the basic algorithms, depending on architecture, for $n=128$. Addition on a neighbor-only architecture is limited to $O\left(n\right)$ time, whereas non-neighbor architectures can reach $O\left(\log n\right)$, demonstrating that physical characteristics of a computing device have an important impact on both real-world running time and asymptotic behavior. Our results will help guide experimental implementations of quantum algorithms and devices.

• Received 28 July 2004

DOI:https://doi.org/10.1103/PhysRevA.71.052320