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IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences 2006 E89-A(2):639-643; doi:10.1093/ietfec/e89-a.2.639
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Copyright © 2006 The Institute of Electronics, Information and Communication Engineers

Regular Section -- Letters -- General Fundamentals and Boundaries

Merging of Systolic Messy Arrays Based on Data Flows

Makio ISHIHARA1, Hironori KIDA2,3 and Minoru TANAKA2

1 The author is with the Faculty of Science and Engineering, Tokyo University of Science, Yamaguchi, Sanyoonoda-shi, 756-0884 Japan. E-mail: makio{at}ed.yama.tus.ac.jp, 2 The authors are with the Faculty of Engineering, Yamaguchi University, Ube-shi, 755-8611 Japan., 3 Presently, with Toshiba Solutions Corporation.

This paper introduces a method of merging systolic messy arrays. A systolic messy array features data-triggered PEs placed in various directions in a 2-dimensional lattice plane. The two kinds of merging are described as Shared-array and Interlacing-array. A shared-array is a systolic messy array where at least two systolic messy arrays share portions of their arrays and the data on the portions is shared with all systolic messy arrays. An interlacing-array is a systolic messy array where at least two systolic messy arrays share portions of their arrays but where the data on the portions is not shared. The data on the portions flows independently so that an interlacing-array can deal with each of its own calculations without interference. Several examples of the two kinds of merging are presented and their construction methods are illustrated.

Key Words: merging, systolic messy array, systolic array, data flow

Manuscript received March 14, 2005. Manuscript revised August 30, 2005. Final manuscript received October 28, 2005.


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