Pixel detector R&D for the Compact Linear Collider

Published 4 June 2019 © 2019 IOP Publishing Ltd and Sissa Medialab
, , The 9th International Workshop on Semiconductor Pixel Detectors for Particles and Imaging Citation M. Benoit 2019 JINST 14 C06003 DOI 10.1088/1748-0221/14/06/C06003

1748-0221/14/06/C06003

Abstract

The physics aims at the proposed future CLIC high-energy linear e+ e collider pose challenging demands on the performance of the detector system. In particular the vertex and tracking detectors have to combine precision measurements with robustness against the expected high rates of beam-induced backgrounds. A spatial resolution of a few microns and a material budget down to 0.2% of a radiation length per vertex-detector layer have to be achieved together with a few nanoseconds time stamping accuracy. These requirements are addressed with innovative technologies in an ambitious detector R&D programme, comprising hardware developments as well as detailed device and Monte Carlo simulations based on TCAD, Geant4 and Allpix2. Various fine pitch hybrid silicon pixel detector technologies are under investigation for the CLIC vertex detector. The CLICpix and CLICpix2 readout ASICs with 25 μm pixel pitch have been produced in a 65 nm commercial CMOS process and bump-bonded to planar active edge sensors as well as capacitively coupled to High-Voltage (HV) CMOS sensors. Monolithic silicon tracking detectors are foreseen for the large surface (≈ 140 m2) CLIC tracker. Fully monolithic prototypes are currently under development in High-Resistivity (HR) CMOS, HV-CMOS and Silicon on Insulator (SOI) technologies. The laboratory and beam tests of all recent prototypes profit from the development of the CaRIBou universal readout system. This paper presents an overview of the CLIC pixel-detector R&D programme, focusing on recent test-beam and simulation results.

Export citation and abstract BibTeX RIS

10.1088/1748-0221/14/06/C06003