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Design and implementation of a single-chip speech-to-speech translation system

Design and implementation of a single-chip speech-to-speech translation system

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This work presents the first chip design for a portable speech-to-speech translation application. First, we construct a speech-to-speech translation system based on multiple-translation spotting (MTS). In terms of the proposed MTS method, the optimal multiple-translation spotting template is retrieved and the appropriate target patterns are extracted. To overcome the computational bottleneck due to the MTS algorithm, this work introduces a template retrieval core and a target pattern extraction core. Combined with a low cost programmable core, this work takes the most out of both programmable and application-specific architectures, including performance, design complexity, and flexibility. This design was experimentally verified via semi-custom chips using 0.35 μm CMOS single-poly-four-metal technology on a die of approximately 3.85×3.85 mm2 size.

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