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VCO-based sigma delta modulator with PWM precoding

VCO-based sigma delta modulator with PWM precoding

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Presented is a new ADC topology based on an asynchronous PWM modulator followed by a VCO and a counter. The PWM modulator first encodes the analogue input into a binary waveform. Then, the VCO implements a multibit first-order noise shaping modulator, sampling and quantising the input signal encoded by the PWM modulator. With this architecture, the linearity of the whole converter is independent of the VCO linearity as the VCO is modulated by a two valued signal only. Proposed is a hardware implementation suitable for low power applications that does not require linear amplifiers.

References

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      • Wismar, U., Wisland, D., Andreani, P.: `A 0.2 V 0.44 µW 20 kHz analog to digital sigma delta modulator with 57 fJ/ conversion FoM', Proc. of 32nd European Solid-State Circuits Conf., 2006 (ESSCIRC 2006), September 2006, Montreux, Switzerland, p. 187–190.
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      • Prefasi, E., Paton, S., Hernandez, L., Gaggl, R., Wiesbauer, A., Hauptmann, J.: `A 0.08 mm', Proc. of ESSCIRC, 2010, September 2010, Seville, Spain, p. 430–433.
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      • Ouzounov, S., Roza, E., Hegt, H., van der Weide, G., van Roermund, A.: `An 8 MHz, 72 dB SFDR asynchronous sigma-delta modulator with 1.5 mW power dissipation', Symp. on VLSI Circuits, 2004, Dig. Tech. Pprs, 2004, June 2004, Honolulu, HI, USA, p. 88–91.
http://iet.metastore.ingenta.com/content/journals/10.1049/el.2011.0061
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