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Ultrafast clock recovery technique for high-speed optical packet networks

Ultrafast clock recovery technique for high-speed optical packet networks

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The authors propose, investigate and demonstrated an ultrafast bit clock recovery technique for packet-switched optical networks. An experimental prototype is constructed using commercial components (multitap delay lines and fast PLDs). Their clock recovery scheme performs clock acquisition within four preamble bits with an optical power penalty of 1 dB at 80 Mbit/s.

References

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      • Cerisola, M., Chlamtac, I., Fumagalli, A., Hofmeister, R.T., Kazovsky, L.G., Lu, C.L., Melman, P., Poggiolini, P.T.: `Ultra-fast clock recovery and subcarrier-based signaling technique foroptical packets switched networks', LEOS 1994 Summer Topical Meeting Digest on Optical Networksand Their Enabling Technologies, 11–13 July 1994, Lake Tahoe, NV, p. 55–56.
    5. 5)
      • Guo, B., Hsu, A., Wang, Y.C., Kubinec, J.: `A 125 Mb/s CMOS all-digital data transceiver using synchronous uniformsampling', TA 6.3, Technical Digest, IEEE ISSCC 1994, February 1994, p. 112–113.
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