SCHEDULED MAINTENANCE
Short-term and long-term memory operations of synapse thin-film transistors using an In–Ga–Zn–O active channel and a poly(4-vinylphenol)–sodium β-alumina electrolytic gate insulator
Abstract
We proposed synapse thin-film transistors with a bottom-gate structure using an In–Ga–Zn–O active channel and a poly(4-vinylphenol)–sodium β-alumina gate insulator. The proposed synapse TFT is a three-terminal electronic device whose conductance can be modulated with various input pulse conditions owing to the movements of sodium ions within the PVP–SBA electrolytic gate insulator. Paired-pulse facilitation (PPF), short-term memory (STM), and long-term memory (LTM) operations were well emulated in the fabricated synapse TFTs, in which output currents were effectively modulated due to the electrostatic coupling in the STM mode and the electrochemical doping in the LTM mode.
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