Abstract
This paper introduces an enhanced hardware/software co-design framework allowing the designer to introduce hardware fault detection properties in the system under consideration. By considering reliability requirements at system level, within a hw/sw co-design flow, it is possible to evaluate overheads and benefits of different solutions. System specification, hardware and software concurrent fault detection design methodologies and hw/sw partitioning are the three key factors taken into account. The paper discusses these aspects providing a complete overview of the reliability co-design project.
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Bolchini, C., Pomante, L., Salice, F. et al. Reliability Properties Assessment at System Level: A Co-Design Framework. Journal of Electronic Testing 18, 351–356 (2002). https://doi.org/10.1023/A:1015047524985
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DOI: https://doi.org/10.1023/A:1015047524985