Economic Analysis of Test Process Flows for Multichip Modules Using Known Good Die

Abstract

The cost and quality of a multichip assembly is highly dependentupon the cost and quality of the incoming die. In the case of a baredie assembly, it is often highly desirable to use either Known Good Die(KGD) or die that have been burned-in and tested to the same level ofquality and reliability as their packaged die equivalents. However,performing full bare die burn-in and test may not always becost-effective. This paper examines the question of whether it isalways necessary to use KGD to produce a cost-effective multichipmodule (MCM) of acceptable quality. A process-flow based cost modelis used to compare the cost and quality of MCMs assembled with KGD toMCMs assembled with die that have received wafer-level test only. Inaddition to test effectiveness at the wafer, die, and module level,factors that are considered include die complexity (size and I/O), number of die per MCM, the cost of producing the KGD, andrework costs and effectiveness. The cost model captures inputs fromwafer fabrication through MCM assembly and rework. Monte Carlosimulation is used to account for uncertainty in the input data.The resulting sensitivity analyses give final MCM cost and quality asa function of the various factors for both KGD and die that havereceived wafer-level test only.