Abstract

The efficiency of a large-scale multicomputer is critically dependent on the performance of its interconnection network. Current multicomputers have widely employed the torus as their underlying network topology for efficient interprocessor communication. In order to ensure a successful exploitation of the computational power offered by multicomputers it is essential to obtain a clear understanding of the performance capabilities of their interconnection networks under various system configurations. Analytical modelling plays an important role in achieving this goal. This study proposes a concise performance model for computing communication delay in the torus network with circuit switching in the presence of multiple time-scale correlated traffic which is found in many real-world parallel computation environments and has strong impact on network performance. The tractability and reasonable accuracy of the analytical model demonstrated by extensive simulation experiments make it a practical and cost-effective evaluation tool to investigate network performance with various alternative design solutions and under different operating conditions.

Keywords: Multicomputers; Circuit switching; Multiple time-scales; Correlated traffic; Burstiness; Performance modelling

Article Outline

1. Introduction

2. Traffic modelling

3. The analytical model

3.1. Assumptions and notation

3.2. Derivation of the model

3.2.1. Modelling the traffic generated by source nodes

3.2.2. Modelling the traffic on network channels

3.2.3. Calculation of the average degree of virtual channel multiplexing ()

3.2.4. Calculation of the LST of the path set-up time (E^*(s))

3.2.5. Calculation of the blocking probability at a network channel (Block_i)

3.2.6. Calculation of the mean waiting time in the source node ()

4. Validation of the model

5. Conclusions

Acknowledgements

Appendix A. Notation

References

Vitae