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Neurocomputing
Volume 71, Issues 1-3, December 2007, Pages 30-44
Dedicated Hardware Architectures for Intelligent Systems; Advances on Neural Networks for Speech and Audio Processing
 
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doi:10.1016/j.neucom.2006.11.027    How to Cite or Link Using DOI (Opens New Window)
Copyright © 2007 Elsevier B.V. All rights reserved.

Inter-neuron communication strategies for spiking neural networks

F. Tuffya, Corresponding Author Contact Information, E-mail The Corresponding Author, L.J. McDaida, V.W. Kwanb, J. Aldermanb, T.M. McGinnitya, J.A. Santosa, P.M. Kellya and H. Sayersa

aIntelligent Systems Engineering Laboratory, Magee Campus, University of Ulster, Derry, Northern Ireland, BT48 7JL, UK bTyndall National Institute, Lee Maltings, Prospect Row, Cork, Ireland

Available online 1 August 2007.

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Abstract

This paper investigates alternative approaches to conventional metal interconnect for inter-neuron communication in spiking neural networks (SNNs). Two communication methodologies are considered where the first approach uses a time multiplexing architecture (TMA) where neurons on one layer are sampled sequentially and the associated spikes are transmitted to neurons in subsequent layers via a single metal track. Pulse transmission delays occur between neuron layers and the consequence of these delays on the performance of a SNN is investigated. In the second approach, capacitive coupling (CC) between neuron layers is used as the communication method and a model that predicts the dependency of the coupling signals between neuron layers as a function of the neuron density, frequency and track loading is presented. To maximise the available bandwidth and also the number of frequencies that can be utilised, micro-electro-mechanical systems (MEMS) are considered because of their high Q value. Issues such as frequency matching, MEMS processing, fabrication of capacitors and associated oscillator/filter circuits are discussed. The paper investigates both approaches and a comparison between the silicon area occupied by these and conventional metal is given for a 1.5 μm CMOS process.

Keywords: Interconnect; Hardware; Multiplexing; Spiking neuron

Article Outline

1. Introduction
2. Interconnect realisation approaches for ANNs
3. Time multiplexing architecture (TMA) for SNN interconnect
3.1. The TMA approach
3.2. TMA system simulation
3.3. Pulse transmission delay
3.4. Area consumption of the TMA
3.5. Potential scalability of the TMA
4. Capacitive coupling (CC) for inter-neuron communication
4.1. The CC approach
4.2. The CC model
4.3. CC implementation
4.4. CC fabrication issues
4.5. Scalability of CC implementation
4.6. Comparison of CC approach with TMA and metal interconnect
5. Conclusions
Acknowledgements
References
Vitae


















Neurocomputing
Volume 71, Issues 1-3, December 2007, Pages 30-44
Dedicated Hardware Architectures for Intelligent Systems; Advances on Neural Networks for Speech and Audio Processing
 
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