doi:10.1016/j.mssp.2004.09.082
Copyright © 2004 Elsevier Ltd All rights reserved.
Separation by bonding Si Islands (SBSI) for LSI applications
T. Yamazakia,
,
, S. Ohmia, S. Moritaa, H. Ohria, J. Murotab, M. Sakurabab, H. Omic, Y. Takahashic and T. Sakaia
aInterdisciplinary Graduate School of Science and Engineering, Tokyo Institute of Technology G2-3, 4259 Nagatsuta, Midori-ku, Yokohama-shi, Kanagawa 226-8502, Japan
bResearch Institute for Electrical Communications, Tohoku University 2-1-1 Katahira, Aoba-ku, Sendai-shi, Miyagi 980-8577, Japan
cNTT Basic Reseach Laboratories, Nippon Telegraph and Telephone Corporation 3-1 Morinosato, Wakamiya, Atsugi-shi, Kanagawa 243-0198, Japan
Available online 27 October 2004.
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Abstract
We propose and describe a novel method called separation by bonding Si islands (SBSI) that can be used to form silicon-on-insulator (SOI) and isolation regions simultaneously. The Si islands are formed by selectively etching the SiGe layer of Si/SiGe stacked layers grown by chemical vapor deposition (CVD). Thin oxide layers are formed at the surface of the Si islands and the Si substrate by using thermal oxidation, and the Si islands are bonded to the Si substrate with the oxide layers. We obtained a uniform SOI layer and a smooth interface between the SOI and buried oxide (BOX) layers. The thicknesses of the SOI and BOX layers observed with cross-sectional transmission electron microscopy (TEM) were 18.2 and 23.5 nm, respectively.
Keywords: Silicon on insulator; Patterned SOI; SiGe; Selective etching
Fig. 1. Schematic fabrication procedure of separation by bonding Si islands (SBSI) process.
Fig. 2. Cross-sectional SEM image after selective etching of SiGe layer in cap-Si(70 nm)/Si0.67Ge0.33(10 nm)/Si substrate.
Fig. 3. Dependence of etching depth and rms surface roughness on etching time for Si0.67Ge0.33(36 nm)/buffer-Si(70 nm)/Si substrate.
Fig. 4. (a) Cross-sectional TEM image after annealing for cap-Si(70 nm)/SiGe(10 nm)/Si substrate, and (b) enlarged image of thermal oxide at edge of cap-Si layer (B–B′ cross section).
Fig. 5. Cross-sectional SEM image after selective etching of SiGe layer.
Fig. 6. (a) Cross-sectional TEM image after annealing for cap-Si(30 nm)/SiGe(75 nm)/Si substrate, and (b) enlarged image of cap-Si layer(B–B′ cross section).