Fault isolation at P/N junction by nanoprober
Introduction
Because of the complexity of current IC layout and advanced processes down to tens of nanometers more accurate fault isolation is needed for success failure analysis (FA). With the help of the optical electrical failure analysis (EFA) techniques, coarse location of failure can be firstly determined. Based on the detection mechanism, the size of hot spots falls in a region of tens of micrometers [1], [2]. For the back-end (metal layer) fail issues, hot spots give a good guideline for the further physical failure analysis (PFA) to find the failure. Fails at the device level, especially for the soft damage which might be easily overlooked by FIB/SEM global check, advanced precise fault isolation is needed to increase the FA yield. Many analytical tools have been developed for such purposes [3], [4], [5].
Nanoprober is one of the cutting-edge tools mainly designed for such purpose. Single device electric characterization can be directly obtained by placing sharp tungsten (W) probers on specific contacts, such as gate, source, and drain. The suspicious leakage path can be identified by comparing results to a reference device nearby. The system used in this study is an atomic force microscope (AFM)-based nanoprober [5]. The advantage of the AFM-based nanoprober is no electron injection/accumulation effects during probing, which might alter the device characteristics. This is crucial for the advanced technology node devices, especially smaller than 28 nm [6].
In this paper, a likely leakage path between N-WELL and P-WELL was identified by the nanoprober. The length for these two WELLs is about 10 μm covered 18 pick-up WELL contacts per each side. In order to narrow down the failure window for further analysis, a new FA method was proposed by combining nanoprobing results together with semi-empirical calculation. In the end, plane-view (PV) TEM analysis confirmed our result.
Section snippets
Experiments
In this case, one failed chip with 0.35 μm technology node was investigated. The abnormal IC was first investigated by the optical beam induced resistance change (OBIRCH). Hot spot at an area of logic cell was found. In order to identify the fail mechanism, physical failure analysis (PFA) was carried out. We started with the back-end process examination. No obvious abnormalities were observed by layer-by-layer parallel lapping and inspection from top metal down to contact layer.
For front-end
Results and discussions
For such purpose, a new analytic method was proposed: Firstly, a reverse bias (2.5 V) was applied between N-well and P-well. Leakage current was measured between the NW1 (the first pick-up contact at the N-well, see Fig. 2) and PW1 to PW18, individually. Results were shown in Fig. 3a, where the leakage current varied with the contact being probed. With this configuration, the leakage current would flow along the shortest path from the NW1 to each pick-up contact being probed at the P-well via
Summary
In summary, our proposed FA method about failure isolation at P-well/N-well junction has been demonstrated. The location of failure can be successfully predicted by combining nanoprobing results together with semi-empirical calculation. This will certainly increase the FA hit rate, especially for advanced technology node.
Acknowledgements
The authors would like to thank colleagues from TEM and FA teams at MA-tek for discussion about this case.
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