Elsevier

Microelectronics Reliability

Volume 48, Issues 8–9, August–September 2008, Pages 1490-1493
Microelectronics Reliability

Reduction of test effort. Looking for more acceleration for reliable components for automotive applications

https://doi.org/10.1016/j.microrel.2008.07.034Get rights and content

Abstract

Experience shows that chip package interaction is a dominant cause for failures of electronic components. Optimising the technology by applying the standard temperature cycling test to detect these failures is very time consuming and not any more compatible with today’s development cycles.

Early failure indicators (preferable electrically measurable) could be the key element to reduce the test effort and to guarantee the performance in an application.

From the package point of view there are three main drivers to be taken into consideration: The temperature, i.e. all degradation processes with an activation energy, temperature swings, which cause thermo-mechanical stress due to different CTE (coefficient of thermal expansion) of the variety of different materials used for the assembly, and temperature gradients, especially when active cycles are applied (switching of the device) can lead to metal reconstruction and plastic deformation, reducing lifetime of the component drastically. Knowledge of the weak areas allows choosing the best test in order to make the addressed failure mode observable in the shortest time.

This paper provides a decision basis to speed up technology qualification by using TS (thermal shock) instead of TC (thermal cycling). Results will be shown for different die attach materials.

Introduction

Standard procedures for product qualification do not aim at generating fails or showing weaknesses of a component. They are used to provide a certain confidence that no fails will occur under use conditions. Contrary to this point of view is the technology development. Here tests are done to find weaknesses of the component under well defined stress. Therefore, it is absolutely necessary to test until failures are clearly detectable. In Fig. 1, the possible impacts due to temperature are illustrated. Not only temperature must be taken into account but also the temperature gradient and the temperature swing.

Temperature cycling of electronic components is a highly accepted test method to prove the reliability of a component [1], [2], [3], [4]. The today often accepted number of 1000 cycles passed with no objection concerning the defined failure criterion is not any more sufficient for future applications. End of life tests will be obligatory and will increase the test effort and cost significantly.

Temperature swings address phenomena as delamination at interfaces as die attach or adhesion of moulding compound. Accelerated testing can be performed by using thermal cycling (air to air) or thermal shock (liquid–liquid).

Therefore new approaches are necessary to reduce the test effort. Modelling based on physics of failure must be improved to be able to predict precisely time to failure under use conditions.

Section snippets

Simulation and experiments

Based on the assumption that heat conductance and heat capacity are well known parameters of the used materials to build the components, simulations of the heat transfer during cycling were performed. Especially the aspect how long it takes to reach thermal equilibrium and what kind of stress is induced due to the temperature gradient (Fig. 2) during cycling was of interest.

Using the finite-element-method (Software: ANSYS) the thermo-mechanical stress during both conventional thermal cycling

Results

A comparison of failure modes and failure mechanisms induced by thermal cycling was presented. Test methods like preconditioning, thermal cycling and thermal shock were assessed based on experiments on P-DSO-36 and TO220 like packages. For the observed delaminations a test procedure was proposed to provoke the failure mode in a short time (<1 day). It has been demonstrated that lead (Pb) as a die attach material is the root cause for the observed failure mode. Substitution of lead shows a

Conclusion

For the observed failure modes TS calibrated with a thermal simulation can speed up test time significantly by factors of 50 and even more. This allows turnaround times for product development of less than 1 day to judge the robustness of the component against temperature swings.

The here described procedure should also be applied to other temperature tests like active cycling. Anyway the demand for shorter test cycles especially for long lasting end of life tests should stimulate the research

References (4)

  • AEC-Q100. Failure mechanism based stress test qualification for integrated...
  • JESD47. Stress-test-driven qualification of integrated circuits (JEDEC solid state technology...
There are more references available in the full text version of this article.

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