A New Emitter Switched Thyristor (EST) employing Trench Segmented p-base

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Abstract

A new emitter switched thyristor (EST) employing trench segmented p-base, which successfully improves the forward I–V and switching characteristics with decreasing the device active area, is proposed and verified experimentally with using shallow trench process of novel junction termination extension (JTE) method. The latching current of EST is determined by the p-base resistance of upper npn transistor. Floating n+emitter of conventional EST is enlarged to obtain large base resistance. However, the proposed EST increases the p-base resistance with shorter floating n+ emitter than that of conventional one. Shallow trench in floating emitter region forms the highly resistive p-base region under the bottom of trench. The experimental results show that the shortened floating n+ emitter and lowered latching current of proposed EST decrease experimentally the forward voltage drop by 17.7% and snap-back phenomenon with small active area. The breakdown voltage of series lateral MOSFET of proposed EST is increased from 7 to 14 V due to the trench filled with oxide which results in vertical redistribution of electric field, therefore current saturation capability and forward biased safe operating area (FBSOA) of proposed EST are enhanced. The simulation results show that the switching operation is performed successfully at the blocking voltage of 600 V and Eoff of the proposed one is reduced by 3.7%. The measured inductive load switching characteristics also shows that Eoff of proposed one is improved by 7.2%.

Introduction

MOS-gated thyristors [1] such as MCT (MOS-controlled thyristor), base resistance controlled thyristor (BRT) and emitter switched thyristor (EST) have been extensively studied since, 1990s for high power applications such as industrial motor control because of its high input impedance and superior forward characteristics to IGBT. Among MOS-gated thyristors, EST has attracted considerable attention due to its unique gate-control current saturation feature, which is the important feature for short circuit protection [2].

The low forward voltage drop of EST is obtained by latching of main thyristor connected to MOS gate in series. It is well known that latching current of main thyristor increases with deceasing the base-resistance of EST and the floating n+ emitter length (Le) should be increased to prevent the degradation of forward I–V characteristics with the increase of base resistance. However, large floating n+ length increases device's active area, which results increase of forward voltage drop of EST.

In order to lower the latching current of main thyristor, various devices such as segmented p-base EST (SB–EST) and corrugated p-base BRT (CB–BRT) have been reported [4], [5]. The corrugated structure employing highly resistive lateral diffusion region in p-base is introduced to obtain the large base resistance. This corrugated structure also requires proportional increase of active area to suppress the snap-back of forward conduction.

Recently, a novel junction termination extension (JTE) method using shallow trenches is introduced to decrease the JTE area at the same blocking capability [6]. The shallow trenches of 1–3 um are essential for the redistribution of electric field which results in enhancement of breakdown voltage with the smaller JTE area compared to conventional method's one.

The purpose of our work is to propose a novel structure of EST employing trench segmented p-base (TSB–EST) and verify by experiment and 2D numerical simulation for the improvement of forward characteristics and the reduction of the active area. The 1200 V EST is fabricated for the experiment and the simulation is performed by ISE–TCAD [7].

Section snippets

Device structure and operation

Table 1 shows the device parameters used for simulation and experiment. We have fabricated the EST employing the trench IGBT compatible eight mask process for the experiment. Fig. 1 shows the cross-sectional view of the conventional EST and the proposed one. It is noted that shallow trench process of one mask layer is added to form the segmented p-base, this trench is applied simultaneously to the JTE method as above mentioned.

In conventional structure, the holes injected from the anode should

Simulation and experimental results

Simulation results of Fig. 2 show that TSB–EST of trench depth (DTR) 3 um does not exhibit the snap-back phenomenon because the trench separate the p-base of junction depth (Xj) 3 um into two region, which increases the RM infinitely. Forward I–V characteristics of DTR 2 um shows snap-back phenomenon due to the smaller RM, which caused by the highly resistive lateral diffusion region under the trench. However, this RM is sufficiently large value to lower the latching current of main thyristor

Conclusion

A new EST employing the trench segmented p-base (TSB–EST) is proposed and verified by the experiment and numerical simulation for improving the forward I–V characteristics and decreasing the device size. Experimental result shows that the forward voltage drops of TSB–EST is significantly reduced by 17.7%, which causes lowered latching current of main thyristor and shortened floating n+ emitter. Shallow trench of proposed structure have increased RM effectively through damming up the hole

Acknowledgements

This work has been supported through KISTEP sponsored by the Korea Ministry of Science and Technology.

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