Review articleUsing block copolymers as infiltration sites for development of future nanoelectronic devices: Achievements, barriers, and opportunities
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Section snippets
Overview
From its inception over 50 years ago, patterning of reduced silicon structures has been the fulcrum of semiconductor manufacturing, sustaining the evolution of Moore's Law [1], [2]. Producing smaller transistor features to prolong Moore's Law has predominantly been achieved through lithographic means, where a design or feature developed on light sensitive films (resists) are transferred using etching into the wafer substrate [3]. Owing to well documented diffraction limits that hinder device
Sequential infiltration synthesis (SIS)
A powerful method to develop inorganic features in BCP materials is sequential infiltration synthesis, referred to as SIS. Of the experimental methods described here, there is a distinct advantage associated with the SIS method for nanoelectronic device manufacturing practices given that the method stems from atomic layer deposition (ALD) processes. The seminal work was reported by researchers at Argonne National Laboratory for creating Al2O3 nanofeatures in a PS-b-PMMA BCP [73]. Since ALD is
Barriers
The aim of this section is to provide a general overview of DSA integration issues for overall context, while specifying potential solutions for advancing BCP infiltration strategies in the near term. The DSA field has witnessed extensive investigation of the methods of inorganic nanofeature development over the past 5 years or so. Significant fabrication milestones have been achieved for potential realization of nanoelectronic devices, namely; feature size control [110], [111], pattern
Opportunities
As well as the barriers to uptake of the technology in current devices, there are opportunities in new nanoelectronic device technologies for “smart” materials like BCPs [145]. Device concepts are evolving at an unprecedented rate, e.g. potential monolithic integration of memory and logic layers [146]. The requirement to develop novel device architectures for low power, energy autonomous and integrated devices are driven by “More than Moore” or functional diversification technologies [147].
Acknowledgements
The authors gratefully acknowledge Semiconductor Research Corporation (SRC) and Science Foundation Ireland (SFI) through the AMBER, SFI Centres research grant programme (grant number 09/IN.1/602) for support of this work. The authors sincerely thank Matt Shaw (Intel) for helpful discussions and suggestions contributing to this manuscript.
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