Practice articleModel predictive direct power control for modular multilevel converter under unbalanced conditions with power compensation and circulating current reduction
Introduction
Recently, modular multilevel converter (MMC) has emerged as an attractive solution for high-voltage high-power applications, such as high-voltage direct current (HVDC) transmission systems [1], static synchronous compensator [2] and wind turbine applications [3]. Meanwhile, new power converter topologies and latest achievements in terms of control have expanded the application of the MMC to power conditioning and machine drives [4], among others. Compared with the other power converter topologies, the MMC-based system exhibits better modularity, scalability, flexible redundant operations, and fault-tolerance ability. These prominent merits have attracted much attention among a large number of scholars and research institutions in related fields.
Pulse width modulation (PWM) approach and classical linear control method are widely used to regulate several control objectives of the MMC, such as grid-side powers and currents control, sub-module (SM) capacitor voltage balancing, elimination of three-phase circulating currents and minimization of ripples in SM capacitor voltage as well as switching frequency (SF) reduction. These aforementioned control schemes can be divided into two categories including open-loop approach and closed-loop approach. An SMs selection mechanism and estimation of the stored energy in arms are utilized in the open-loop approach controller in [5]. In addition, the classical closed-loop control methods designed in various coordinate systems are introduced in [6], [7], where multiple proportional–integral (PI) regulators or proportional-resonant (PR) regulators in terms of parallel control loops are adopted to achieve the aforementioned control objectives of the MMC. As mentioned in [8], [9], [10], the implementation of classical control methods for an MMC is a cumbersome process, and their performance greatly depends on the controller gains and its bandwidth.
To overcome the drawbacks of classical control methods, several advanced control strategies are proposed [1], [11], [12]. Among them, the finite control-set model predictive control (FCS-MPC) approach emerges as an alternative solution in the control of high-power multilevel converters [1]. FCS-MPC takes into account the discrete nature of the power converter to formulate the MPC algorithm and does not require an external modulator [11], [12]. The salient feature of the FCS-MPC approach is the prediction of future behaviors of system variables through a discrete-time domain mathematical model while keeping a fast dynamic response. Besides, the FCS-MPC method owns the merits of overcoming the traditional cascaded control structures, the possibility of combining an optimization criterion, and the capability to deal with multiple variables within a cost function [13], [14]. Although the multiple control objectives with desired performance can be achieved by the FCS-MPC strategy, it suffers from an excessive growth in computational burden with high output voltage levels and time-consuming work caused by tuning of weighting factors. These challenges limit the application of the FCS-MPC approach for MMC. Besides, it will result in an increased power oscillations and circulating current ripples under unbalanced grid-side voltage conditions, which deteriorates the control performance of MMC [15], [16], [17].
Motivated by these limitations, several FCS-MPC methods are presented for determining desired weighting factors with less computational cost and improving control performance under unbalanced operating conditions [18], [19], [20], [21], [22], [23]. In [18], a dual-stage MPC is proposed in order to improve the calculation efficiency. In [19], a novel two-stage MPC is used for suppressing circulating currents with less computational effort. A weighted MPC method is proposed in [20] to satisfy the multivariable of the MMC simultaneously. Different from [20], the weighting factors are eliminated by employing a triple-stage control structure in [21], [22]. Multiple controllers are designed separately to handle several control variables in MMC. However, the synchronous coordinate transformation and grid-voltage phase angle detection are mandatory in predictive current control (PCC) in [21], [22], and the effect of unbalanced grid-side voltage is not investigated. In [23], a model predictive direct power control (MP-DPC) with power compensation algorithm is proposed, which aims to eliminate the power ripples and suppress the deteriorative grid-side currents under unbalanced grid conditions. Despite the desired grid-side currents can be obtained by using the power compensation approach under non-ideal grid-side voltage conditions, the complex positive-/negative-sequence extraction of grid voltage, and phase-locked loop (PLL) are mandatory. Besides, the application for MMC is not considered.
In this paper, an improved MP-DPC method for MMC under both balanced and unbalanced grid-side voltage conditions is proposed. Specifically, the reduction of circulating currents and grid-side power fluctuations are taken into account simultaneously. To mitigate the effect of circulating currents, a single cost function can be established based on the decoupled mathematical model of circulating currents and DC-link current components. Meanwhile, a power compensation strategy is included in the proposed MP-DPC method to enhance the control performance under non-ideal grid-side voltage conditions. Particularly, the compensation values are obtained from grid voltage and its quadrature signals with 1/4 period lagging in stationary coordinate frame. Thus, the complex positive-/negative-sequences extraction and PLL are not required in the proposed solution. Besides, the additional switching action induced by circulating current reduction algorithm and capacitor voltage balancing method is restricted in this design by imposing constraints on the number of switching transitions. Dealing with the same challenge, the proposed MP-DPC method can obtain a desired circulating currents reduction and grid-side power fluctuations suppression without penalizing computational feasibility in comparison with the existing FCS-MPC schemes. Finally, the performance of the proposed MP-DPC method for MMC under both balanced and unbalanced grid-side conditions are confirmed through detailed simulation and experimental analysis.
Compared with some existing works, the salient features of the proposed MP-DPC method are as follows. (i) In contrast to the conventional FCS-MPC methods [1], [12], [24], [25], a multi-stage control structure is established in this paper for separately minimizing the power tracking error, three-phase circulating currents, capacitor voltage ripples as well as the SF. Multiple control objectives are well satisfied with few computations, while the weighting factors and PWM control techniques are eliminated. (ii) Compared with the existed MP-DPC algorithms in [26], [27], [28], [29], [30], this proposed design takes power compensation scheme into consideration under unbalanced grid-side conditions with the aim to enhance the power quality and mitigate total harmonic distortion (THD) in grid-side currents of MMC while remaining computationally feasible. As a result, the grid-side currents distortion and active/reactive power oscillations are suppressed effectively without increasing the computational complexity.
The remainder of this paper is organized as follows. Section 2 presents the topology and mathematical model of a three-phase MMC system. The control performance improvement under unbalanced grid-side voltage conditions is investigated in Section 3. The multi-stage MP-DPC controller is briefly introduced in Section 4. The simulation results in comparison to the conventional method are investigated in Section 5. Section 6 presents the experimental results. Section 7 concludes this paper.
Section snippets
Mathematical model of MMC
The common topology of a three-phase MMC with half-bridge sub-modules (HB-SMs) is shown in Fig. 1. The MMC is composed of three legs, and each leg consists of two arms named as the upper arm and lower arm, which is represented by subscript and , respectively. An arm is realized by connecting N cascaded SMs in series with an arm inductor , where the power losses are presented by an arm resistance . Fig. 2 shows the simplified single-phase equivalent circuit with the positive
Power quality improvement under unbalanced grid conditions
In accordance with the symmetric decomposition theory, the converter consists of positive-, negative- and zero-sequence components under non-ideal grid-side conditions. Assuming that the sum of currents in three-wire system fix to zero, thus the zero-sequence of grid currents along with voltage is zero and can be ignored. The positive- and negative-sequence cause the double-frequency oscillation of powers under unbalanced grid conditions. With necessary to regulate these power ripples, the
Conventional MP-DPC
The conventional MP-DPC scheme considers three control objectives including power tracking, circulating current reduction, and capacitor voltage balancing. In conventional MP-DPC approach, these control variables are incorporated into a single cost function in conjunction with corresponding weighting factors, as given by
Here, are weighting factors, is the reference value of
Simulation results
In order to validate the effectiveness of the proposed MP-DPC with power compensation scheme, comparative simulation studies are carried out. The system parameters are listed in Table 1. In order to avoid damaging the active switches and components in the MMC circuit, the floating capacitors in SM are pre-charged to their nominal value during initialization. Besides, the frequency of grid-side is assumed as constant. Since the determination of weighting factors is still an open research topic,
Experimental verification
In order to further verify the proposed power compensation algorithm, in-depth experimental studies are conducted in this subsection. To exam the control performance, a hardware-in-loop (HIL) test bench is set up with parameters listed in Table 1. The software is implemented on StarSim Field-Programmable Gate Array (FPGA) Circuit Solver (MT FPGA 8000 Solver) and StarSim HIL. Meanwhile, a PXIe7868R (FPGA, K7-325T) is deployed as an external controller.
The experimental study is carried out under
Conclusions and future work
An improved MP-DPC strategy for MMC operating in the state of both balanced and unbalanced grid-side conditions is introduced in this paper. The most outstanding merit of the proposed method is the integration of the multi-stage prediction structure and power compensation technique with the FCS-MPC scheme. The proposed method can not only minimize the circulating currents but also suppress the grid-side powers ripples regardless of the grid conditions. The main advantages of the proposed scheme
Declaration of Competing Interest
The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper.
Acknowledgments
This work was supported in part by the National Natural Science Foundation of China under Grants 61673081, 51979020, 51909021, 51579023, 51939001, and in part by Science and Technology Fund for Distinguished Young Scholars of Dalian under Grant 2018RJ08, and in part by the Stable Supporting Fund of Science and Technology on Underwater Vehicle Technology JCKYS2019604SXJQR-01, and in part by the Innovative Talents in Universities of Liaoning Province under Grant LR2017014, and in part by the
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