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Computational Geometry
Volume 30, Issue 2, February 2005, Pages 95-111
Special Issue on the 19th European Workshop on Computational Geometry
 
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doi:10.1016/j.comgeo.2004.05.006    How to Cite or Link Using DOI (Opens New Window)
Copyright © 2004 Elsevier B.V. All rights reserved.

Chips on wafers, or packing rectangles into grids

Mattias Anderssona, E-mail The Corresponding Author, Joachim Gudmundssonb, Corresponding Author Contact Information, 1, E-mail The Corresponding Author and Christos Levcopoulosa, E-mail The Corresponding Author

aDepartment of Computer Science, Lund University, Box 118, 221 00 Lund, Sweden bDepartment of Mathematics and Computing Science, TU Eindhoven, 5600 MB Eindhoven, The Netherlands

Received 30 June 2003; 
revised 4 May 2004; 
accepted 29 May 2004. 
Communicated by R. Klein. 
Available online 21 September 2004.

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Abstract

A set of rectangles S is said to be grid packed if there exists a rectangular grid (not necessarily regular) such that every rectangle lies in the grid and there is at most one rectangle of S in each cell. The area of a grid packing is the area of a minimal bounding box that contains all the rectangles in the grid packing. We present an approximation algorithm that given a set S of rectangles and a real constant var epsilon>0 produces a grid packing of S whose area is at most (1+var epsilon) times larger than an optimal grid packing in polynomial time. If var epsilon is chosen large enough the running time of the algorithm will be linear. We also study several interesting variants, for example the smallest area grid packing containing at least kless-than-or-equals, slantn rectangles, and given a region A grid pack as many rectangles as possible within A. Apart from the approximation algorithms we present several hardness results.

Keywords: Computational geometry; Approximation algorithms; Packing rectangles


Computational Geometry
Volume 30, Issue 2, February 2005, Pages 95-111
Special Issue on the 19th European Workshop on Computational Geometry
 
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