Elsevier

Measurement

Volume 32, Issue 4, December 2002, Pages 231-239
Measurement

Measuring the static characteristic of dithered A/D converters

https://doi.org/10.1016/S0263-2241(02)00030-1Get rights and content

Abstract

Dithering is a useful technique that removes quantization error and part of the linearity error in A/D converters. Removing the remaining static error requires a periodical fast measurement of the characteristic, which is a rather difficult task because of the intrinsic very high resolution of the dithered device. Focusing on this issue, the paper examines three possible test methods: statistical analysis, time domain analysis, and, with more detail, frequency domain analysis. The peculiar nature of the static characteristic of dithered converters makes the third method particularly attractive. The frequency domain technique is proposed, therefore, as a good practical tool for implementing linearization in A/D converters with dither.

Introduction

Dithering is a common and well-known technique more and more employed with modern analog-to-digital converters (ADCs) for measurement applications [1], [2]. In dithered converters the input is added to a small ‘noise’ (dither signal) before the digitization. More specifically (Fig. 1), in the subtractive topology a pseudorandom dither signal is synchronously added to the analog input and subtracted from the digital output; in the non-subtractive topology the dither signal is only added at the input. In both cases, effective resolution improvement is obtained by filtering or averaging, at the cost of bandwidth or speed reduction. Non-subtractive dither is especially appealing and more common in practice, because it does not need costly hardware for generating a precisely known signal and perform synchronous analog and digital additions. Besides, it can be sometimes implemented by simply exploiting the intrinsic analog noise of the converter, or other small stable signals inherently present in the digitizing hardware. In this paper we will refer always to the non-subtractive dither, but the final results apply without substantial differences also to the subtractive topology.

The dither technique is essentially aimed at reducing systematic conversion errors, including quantization, but there are not standard techniques to measure the static characteristic of the converter for this particular case. The problem lies mainly in the very high (theoretically infinite) resolution of the ADC, and is therefore caused just by the main advantage provided by the dither. An accurate measurement of the characteristic is useful to assess the uncertainty of the device, and is necessary when the aim is to obtain a highly linear converter by further linearization, for example implementing a look-up linearization table like suggested in Ref. [3]. The present paper is therefore focused on this measurement, with special attention to the problem of its velocity: this is indeed a critical point when one must use its results for the periodical automatic recalibration of a look-up table. Section 2 of the paper deals, under a theoretical viewpoint, with linearity errors in ADCs and effect of dither on them. In Section 3 three possible methods for measuring the static characteristic of an ADC with dither are examined, i.e. the statistical analysis (histogram test), the time-domain analysis, and the much faster frequency-domain analysis. Theoretical considerations suggest that the frequency domain approach, usually too imprecise for ordinary converters, is well suited for use with dithered converters. Section 4 reports experimental results that show the practical advantages and drawbacks of each test method with dithered converters, and demonstrates the special effectiveness of the frequency-domain approach.

Section snippets

Effect of dither on the static characteristic of an ADC

In order to examine in detail the effect of dither on the characteristic, it is worthwhile to recall some simple but often misunderstood aspects of linearity error in ADCs, with or without dither. The integral nonlinearity (INL) of a converter is defined (without considering gain and offset errors that are inessential in this analysis) as the differenceinlk=tkid−tkwhere tkid are the ideal (equispaced) threshold levels and tk the actual threshold levels of the quantizing characteristic. The

Measuring the characteristic of dithered ADCs—theory

Measuring the static characteristic means of course comparing the average output with the input, for all possible values of the input. The servo-loop method [4] is simple and direct, but requires a great amount of time (usually many hours). As long as the ADC can be considered a static system even with a dynamic input (a condition commonly met by modern devices, provided that the signal frequency is not too high), an equivalent but much faster method is the histogram test [4]. In the case of

Experimental results

The theoretical conclusion that the FFT method can give very good performance needs of course practical demonstrations. A meaningful validation has been obtained by means of experiments involving an 8-bit flash converter embedded in a digital oscilloscope. It must be considered that the low resolution goes in advantage of histogram and time-domain analysis, as the frequency domain test relies on a low level of quantization and small-scale errors.

All the results reported below have been obtained

Conclusions

Measuring the static characteristic of an ADC with dither is a non-trivial task that cannot be accomplished directly with a standard histogram test. Theory of dithering shows that one can use a histogram test on the ADC without dither and then derive the characteristic by convolution; an alternative is performing a straightforward time-domain analysis. Theory of dithering, however, teaches also that the nonlinearity of a dithered ADC is mainly made of large-scale errors without sharp

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