Content-addressable memory core cells A survey

doi:10.1016/S0167-9260(97)00021-7

Integration

Volume 23, Issue 2, November 1997, Pages 171-188

https://doi.org/10.1016/S0167-9260(97)00021-7 Get rights and content

Abstract

The data stored in a content-addressable memory (CAM) are accessed based on their contents, rather than their location, and this functionality is useful in many applications, including databases, table look-up, and associative computing. The central building blocks of these memories are the core cells, and this paper surveys 14 such cells, primarily from a qualitative perspective. The cells date from 1970, and many innovations have been introduced since then, both in circuit design and fabrication technology. Among the cells described, 11 employ static storage and four use dynamic storage; 14 can be implemented in CMOS, while one requires BiCMOS technology. A discussion follows, highlighting significant design improvements, advocating particular cells for general-purpose use, and suggesting avenues for future research.

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Also, high-power dissipation in NOR-ML becomes attractive targets for CAM to develop designs which dissipate low-power by maintaining its property of high-performance. Among the core cells [1,15,16], a typical high-speed cell is shown in Fig. 3(a) with 6T-SRAM storage. The compare-unit is a 4T match circuit in which a pair of nMOS's (N5-N6/N7-N8) forms a discharge path for the ML in case of miss between Q and SL.
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Content-addressable memory core cells A survey

Abstract

Integration, the VLSI J

Content-addressable and associative memory: alternatives to the ubiquitous RAM

IEEE Comput.

Integrated-circuit content-addressable memories

IEEE J. Solid-State Circuits

Associative processors and memories: a survey

IEEE Micro

Design, selection and implementation of a content-addressable memory for a VLSI CMOS chip architecture

An 8-kbit content-addressable and reentrant memory

IEEE J. Solid-State Circuits

An on-chip smart memory for a data-flow CPU

IEEE J. Solid-State Circuits

A self-testing reconfigurable CAM

IEEE J. Solid-State Circuits

Inexact match associative memory cell

Electron. Lett.