Abstract

In this paper we show that the problem of clustering a combinational circuit under the area or pin constraint so that the clusters are disjoint and the overall input/output delay is minimized is computationally intractable. The minimization of the delay with the disjoint cluster requirement was up to now an open problem, whereas the version that allows replicated components in the clusters is known to have a fast polynomial-time solution. We also describe an improved heuristic for the problem and give comparative experimental results that illustrate the tradeoff between the general decrease in the number of clusters and the general increase in the overall delay of the disjoint over the non-disjoint version.

Author Keywords: Circuit clustering; Circuit partitioning; VLSI

Article Outline

1. Introduction

2. Computational analysis of the problem

3. A heuristic for the problem

4. Experimental results

5. Conclusion

References