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Computers & Graphics
Volume 27, Issue 5, October 2003, Pages 693-699
 
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doi:10.1016/S0097-8493(03)00142-0    How to Cite or Link Using DOI (Opens New Window)
Copyright © 2003 Published by Elsevier Science Ltd.

Graphics hardware

A virtual memory architecture for real-time ray tracing hardware

Jörg SchmittlerCorresponding Author Contact Information, E-mail The Corresponding Author, Alexander LeidingerE-mail The Corresponding Author and Philipp SlusallekE-mail The Corresponding Author

Computer Graphics Lab, Saarland University, Im Stadtwald, Bld. 36.1, Saarbrücken 66123, Germany

Available online 20 October 2003.

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Abstract

Real-time ray tracing offers a number of interesting benefits over current rasterization techniques. However, a major drawback has been that ray tracing requires access to the entire scene data base. This is particularly problematic for hardware implementations that only have a limited amount of dedicated on-board memory.

In this paper we propose a virtual memory architecture for ray tracing that efficiently renders scenes many times larger than the available on-board memory. Instead of wasting large dedicated memory on a graphics card, scene data is stored in main memory, and on-board memory is used only as a cache. We show that typical scenes from computer games only require less than 8 MB of cache memory while 64 MB are sufficient even for scenes with GBs of geometry and textures. The caching approach also minimizes the bandwidth between the graphics subsystem and the host such that even a standard PCI connection is sufficient.

Author Keywords: Real-time ray tracing; Hardware architectures; Memory management

Article Outline

1. Introduction
2. The SaarCOR hardware architecture
3. Virtual memory architecture
4. Results
5. Conclusion and future work
References




Computers & Graphics
Volume 27, Issue 5, October 2003, Pages 693-699
 
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