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Integration, the VLSI Journal
Volume 11, Issue 2, April 1991, Pages 191-204
 
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doi:10.1016/0167-9260(91)90019-H    How to Cite or Link Using DOI (Opens New Window)
Copyright © 1991 Published by Elsevier Science B.V.

An analytic algorithm for global circuit placement

Chong-Min Kyung

Peter V. Kraus and Dieter A. Mlynski

Korea Advanced Institute of Science and Technology, P.O. Box 150, Cheongryang, Seoul, Korea Institut für Theoretische Elektrotechnik und Messtechnik, Universität Karlsruhe (TH), Kaiserstr. 12, D-7500, Karlsruhe, Germany

Received 27 July 1990. 
Available online 12 February 2003.

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Abstract

This paper describes a new optimization procedure called Diffusion which can be used in global circuit placements for suppressing inter-module and module-to-chip boundary overlaps. A salient feature of the proposed Diffusion procedure is that multiple decisions on the moves of all variables (module positions) are simultaneously made such that a global, analytic objective function is minimized. Various strategies are discussed to speed up the convergence, and to prevent the solution from being stuck at local minima. The Net force model is used with the Diffusion procedure to minimize the inter-module wire length besides reducing the inter-module and module-to-chip overlaps. Various experimental results are given. Further potential applications of the proposed procedure include multilayer placement, and placement in arbitrarily-shaped region.

Author Keywords: Placement; layout; macro cell; optimization

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