Computation is modelled as a set of tasks sequentially executed. A compact representation of the computation is obtained by means of Timed Petri Nets: transitions represent the tasks, while places contain data exchanged between tasks. Arcs give the execution ordering. Transitions are labelled by execution time of correspondent tasks. Parallel execution is allowed: tasks belonging to different branches may be performed concurrently.

A heuristic algorithm for dimensioning of hardware architecture is proposed to find a configuration allowing a task allocation which minimizes costs and satisfies predefined performance constraints. Task allocation, when the architecture of the system is given, is also discussed.