Elsevier

Microelectronics Reliability

Volume 46, Issues 2–4, February–April 2006, Pages 270-286
Microelectronics Reliability

Introductory Invited Paper
The negative bias temperature instability in MOS devices: A review

https://doi.org/10.1016/j.microrel.2005.08.001Get rights and content

Abstract

Negative bias temperature instability (NBTI), in which interface traps and positive oxide charge are generated in metal–oxide–silicon (MOS) structures under negative gate bias, in particular at elevated temperature, has come to the forefront of critical reliability phenomena in advanced CMOS technology. The purpose of this review is to bring together much of the latest experimental information and recent developments in theoretical understanding of NBTI. The review includes comprehensive summaries of the basic phenomenology, including time- and frequency-dependent effects (relaxation), and process dependences; theory, including drift–diffusion models and microscopic models for interface states and fixed charge, and the role of nitrogen; and the practical implications for circuit performance and new gate-stack materials. Some open questions are highlighted.

Introduction

The purpose of this review is to bring together much of the latest information and recent developments in understanding of NBTI. There has recently been an explosion of publications on this subject (see, for example, [1], [2]). We aim to be as up-to-date as possible and to have this review represent the state of the field, but the rapid pace of development in this topic means that by the time this review appears in print it may easily miss some important new development. Recent experimental work, especially in the area of AC stress and the associated recovery phenomena, will almost certainly lead to improved understanding in the near future. We have tried to present an objective and unbiased review of the work of many groups, in spite of the fact that one of us (SZ) is the author of a particular NBTI model. It is hoped that this review may help to stimulate additional work by highlighting some areas of disagreement and unresolved issues.

This review is organized as follows: Section 2 describes the experimental observations which characterize NBTI. This section includes sub-sections on basic and novel observations and methods, and on process dependencies. Section 3 deals with models, comparing and contrasting the various theories describing NBTI. This section covers macroscopic drift/diffusion models and microscopic models, including the role of nitrogen. Section 4 treats the practical implications of NBTI, including the performance degradation of circuits and the implications for new gate-stack materials. Finally, Section 5 summarizes some of the many open questions.

Section snippets

Basic observations and methods

We begin with a description of the more rudimentary aspects of the NBTI phenomenon. These have already been extensively reviewed by others [3], [4], so we give here only a brief overview.

The name, negative bias temperature instability (NBTI), refers to the generation of positive oxide charge and interface traps in metal–oxide–silicon (MOS) structures under negative gate bias, in particular at elevated temperature. First reported by Miura and Matukura [5], and further characterized by

Theories and models

Theoretical treatments of NBTI may be divided along two lines of investigation: models to explain the dependence on time, temperature, and voltage/field; and microscopic models of the defects responsible for charge, e.g., to identify the charged defects or to understand the origin of nitrogen-enhanced NBTI.

Circuit performance degradation

The negative threshold voltage (Vt) shift caused by NBTI results in lowered drive current for p-FETs, since the maximum drain current, for gate voltage equal to source–drain voltage (Vg = Vds) is given approximately by [19], [105]Isat=μeffCoxWL(Vg-Vt)θfor a transistor of width W, length L, and capacitance Cox per unit area. (We consider only long-channel devices in this discussion.) Typically θ ranges from 2 for long-channel devices to close to unity for short channels (<1 μm). Differentiating Eq.

Conclusions

NBTI is a combination of positive trapped charge and interface state generation, resulting whenever negative gate bias is applied to a MOS structure. In spite of having been first reported nearly half a century ago, and notwithstanding a recent uptick in interest, many fundamental and practical questions remain.

Certain disagreements among published results, e.g., as to whether Vt recovery involves Nit or Nf or both, may well be a result of differences among the samples used in various studies.

Acknowledgements

We are grateful for helpful discussions with many people, especially (in alphabetical order): Ron Bolam, Anthony Chou, Toshiharu Furukawa, Terrence Hook, Meir Janai, Tassos Katsetos, Terrance Kueper, Giuseppe Larosa, Joe Lukaitis, Greg Massey, Steve Mittl, and Stewart Rauch. We also wish to thank Tak Ning, and Jeff Welser for motivating our interest in this subject.

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