Abstract
The purpose of this paper is to consider the interaction among shop floor control strategies (order review/release and dispatching, ORR) and its effect on the performance of the printed circuit board manufacturing system with multiple bottleneck workstations. For that purpose, we suggest the pull from ORR strategies based on bottleneck-load and simulation tests and TOPSIS analysis are performed to compare various combinations of bottleneck-load ORR mechanisms and dispatching rule at each bottleneck workstation. An experiment is performed based on a real case in Korea and used for data from simulation test. The performance of proposed ORR strategies is improved when the strategies are combined with a suitable dispatching rule at each bottleneck workstation. The experimental results demonstrate that the interaction between the bottleneck-load ORR and the optimal combination of the dispatching rule at each bottleneck workstation is highly relevant with respect that the performance indicators have a characteristic of “lower is better”, such as average tardiness, cycle time, and WIP level.
This is a preview of subscription content, log in via an institution to check access.
Similar content being viewed by others
References
Arnold, J. R. T., “Introduction to Materials Management,” Prentice Hall, 1992.
Barrett, R. T. and Barman, S., “A SLAM II Simulation Study of a Simplified Flow Shop,” Simulation, Vol. 47, No. 5, pp. 181–189, 1986.
Bahaji, N. and Kuhl, M. E., “A Simulation Study of New Multi-Objective Composite Dispatching Rules, CONWIP, and Push Lot Release in Semiconductor Fabrication,” International Journal of Production Research, Vol. 46, No. 14, pp. 3801–3824, 2008.
Blackstone, J. H., Phillips, D. T., and Hogg, G. L., “A State-of-the-Art Survey of Dispatching Rules for Manufacturing Job Shop Operations,” The International Journal of Production Research, Vol. 20, No. 1, pp. 27–45, 1982.
Gilland, W. G., “A Simulation Study Comparing Performance of CONWIP and Bottleneck-based Release Rules,” Production Planning & Control, Vol. 13, No. 2, pp. 211–219, 2002.
Hwang, C. L. and Yoon, K. P., “Multiple Attribute Decision Making: Methods and Applications,” Springer-Verlag, 1981.
Hopp, W. J. and Spearman, M. L., “Factory Physics: Foundations of Manufacturing Management,” Irwin/McGraw-Hill, 1996.
Kahraman, C. and Kaya, T., “A Fuzzy Approach to E-Banking Website Quality Assessment based on an Integrated AHP-ELECTRE Method,” Technological and Economic Development of Economy, No. 2, pp. 313–334, 2011.
Lu, H., Huang, G. Q., and Yang, H., “Integrating Order Review/Release and Dispatching Rules for Assembly Job Shop Scheduling using a Simulation Approach,” International Journal of Production Research, Vol. 49, No. 3, pp. 647–669, 2011.
Park, Y. J., Pan, R., Borror, C. M., Montgomery, D. C., and Lee, G. B., “Simultaneous Improvement of Energy Efficiency and Product Quality in PCB Lamination Process,” Int. J. Precis. Eng. Manuf.-Green Tech., Vol. 1, No. 3, pp. 247–256, 2014.
Panwalkar, S. S. and Iskander, W., “A Survey of Scheduling Rules,” Operations Research, Vol. 25, No. 1, pp. 45–61, 1977.
Petroni, A. and Rizzi, A., “A Fuzzy Logic based Methodology to Rank Shop Floor Dispatching Rules,” International Journal of Production Economics, Vol. 76, No. 1, pp. 99–108, 2002.
Salvador, M. S., “A Solution to a Special Class of Flow Shop Scheduling Problems,” Proc. of Symposium on the Theory of Scheduling and Its Applications, pp. 83–91, 1973.
Sha, D. Y., Hsieh, L. F., and Chen, K. J., “Wafer Rework Strategies at the Photolithography Stage,” International Journal of Industrial Engineering, Vol. 8, No. 2, pp. 122–130, 2001.
Spearman, M. L., Woodruff, D. L., and Hopp, W. J., “CONWIP: a Pull Alternative to Kanban,” The International Journal of Production Research, Vol. 28, No. 5, pp. 879–894, 1990.
Yang, T., Kuo, Y., and Cho, C., “A Genetic Algorithms Simulation Approach for the Multi-Attribute Combinatorial Dispatching Decision Problem,” European Journal of Operational Research Vol. 176 No. 3 pp. 185–1873, 2007.
Wein, L. M., “Scheduling Semiconductor Wafer Fabrication,” IEEE Transactions on Semiconductor Manufacturing, Vol. 1, No. 3, pp. 115–130, 1988.
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
About this article
Cite this article
Yoon, SW., Cho, YJ. & Jeong, SJ. Combination effects analysis of bottleneck-load order review/release and the dispatching rule: Application to a printed circuit board manufacturing line with multiple bottlenecks. Int. J. Precis. Eng. Manuf. 15, 1725–1732 (2014). https://doi.org/10.1007/s12541-014-0525-4
Received:
Revised:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s12541-014-0525-4