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Hybrid delta-sigma ADC

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Abstract

A hybrid (analog/digital) architecture is proposed to implement a robust high-resolution delta-sigma modulator with a single-bit output. The system contains a low-order multi-bit analog noise-shaping loop, followed by a scaling block and a high-order single-bit digital modulator. The combination simplifies the realization of the analog modulator, and it allows the use of most of its full-scale input range.

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Authors and Affiliations

  1. Department of Electrical Engineering and Computer Science, Kelley Engineering Center, Oregon State University, Corvallis, OR, 97331-5501, USA

    Yan Wang & Gábor C. Temes

  2. Asahi Kasei Microdevices, Atsugi, Kanagawa, 243-0021, Japan

    Koichi Hamashita

Authors
  1. Yan Wang
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  2. Koichi Hamashita
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  3. Gábor C. Temes
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Corresponding author

Correspondence to Yan Wang.

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Wang, Y., Hamashita, K. & Temes, G.C. Hybrid delta-sigma ADC. Analog Integr Circ Sig Process 63, 293–298 (2010). https://doi.org/10.1007/s10470-009-9397-4

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  • DOI: https://doi.org/10.1007/s10470-009-9397-4

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