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A low-power integrated neural interface with digital spike detection and extraction

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Abstract

We present the design of an integrated neural interface intended for multi-channel neural recording. The design features a mixed-signal part that handles neural signal conditioning, digitization, time-division multiplexing, and a digital module providing control, absolute threshold detection, extraction of spikes, and serial communications towards a host interface. The detection and extraction strategy preserves the entire neuronal spike waveshapes by means of synchronized internal data buffering. This bandwidth reduction scheme prompts for better waveform sorting results and improved performance in prosthetic applications. Both parts of the presented neural interface were fabricated separately in a CMOS 0.18 μm process. The whole neural interface features 16 channels for validation, but, the proposed approach is scalable to larger channel counts. The performance of the implemented neural interface was validated on testbench with synthetic neural waveforms. It features a power consumption of 138 μW per channel and a size of 2.304 mm2, and achieves a bandwidth reduction factor of up to 48.

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Acknowledgment

The authors acknowledge the design and testing tools from CMC Microsystems, and thank Prof. C. A. Chapman, (Concordia University, Mtl.), for providing the neural waveforms. Also, we acknowledge the contribution of J. -F. Roy and P.-Y. Robert to this work, and we thank Laurent Mouden for realizing the chip on board assembly.

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Authors and Affiliations

  1. Department of Electrical Engineering, Polystim Neurotechnologies Laboratory, École Polytechnique de Montréal, Montréal, QC, H3C 3A7, Canada

    Benoit Gosselin & Mohamad Sawan

Authors
  1. Benoit Gosselin
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  2. Mohamad Sawan
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Corresponding author

Correspondence to Benoit Gosselin.

Additional information

This work was supported in part by the Natural Sciences and Engineering Research Council of Canada and the Canadian Research Chair on Smart Medical Devices.

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Gosselin, B., Sawan, M. A low-power integrated neural interface with digital spike detection and extraction. Analog Integr Circ Sig Process 64, 3–11 (2010). https://doi.org/10.1007/s10470-009-9371-1

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  • DOI: https://doi.org/10.1007/s10470-009-9371-1

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