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Adaptive log domain filters for system identification using floating gate transistors

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Abstract

We describe an adaptive log domain filter with integrated learning rules for model reference estimation. The system is a first-order low pass filter implemented using multiple input floating gate transistors operating in subthreshold to realize on-line learning of gain and cut-off frequency. We use adaptive dynamical system theory to derive robust control laws for gain and cut-off frequency adaptation in a system identification task. Simulation results show that convergence is slower using simplified control laws but still occurs within milliseconds. Experimental results confirm that the estimated gain and cut-off frequency track the parameters of the reference filter. The adaptive log domain filter has measured power consumption of 33 μW. During operation, deterministic errors are introduced by mismatch within the analog circuit implementation. An analysis is presented which attributes the errors to current mirror mismatch.

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Acknowledgements

This work was supported in part by the U.S. National Science Foundation under CAREER Award NSF-EIA-0238061 and by the Laboratory for Physical Sciences. The authors thank the MOSIS service for providing chip fabrication through their Educational Research Program. These circuits were used in an undergraduate course in mixed signal circuit design.

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering and the Institute for Systems Research, University of Maryland, College Park, MD, 20742, USA

    Yiming Zhai & Pamela Ann Abshire

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  1. Yiming Zhai
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  2. Pamela Ann Abshire
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Correspondence to Yiming Zhai.

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Zhai, Y., Abshire, P.A. Adaptive log domain filters for system identification using floating gate transistors. Analog Integr Circ Sig Process 56, 23–36 (2008). https://doi.org/10.1007/s10470-007-9083-3

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