Abstract
Developing technologies need smaller and faster IC’s, hence transistor size has to be scaled down. In order to satisfy this, transistor size in a chip has been decreased drastically from micro range to nano-range. MOSFET was the mass element in any IC at micro size, but when scaled down to nano regime performance degrades because of short channel effects. It is shown here that the FinFET, which gives the better performance and scalability, will replace it. However in 14 nm node and beyond, FinFET also has certain disadvantages; hence some performance enhancement techniques have been introduced to yield good results in 14 nm node. Such techniques include changing the channel materials, use of high-K gate dielectric, etc. We used parameters defined in ITRS update 2013 to simulate FinFET in 14 nm node and we adapted various techniques. Finally the performance enhancement of both finFET and CNTFET for 14 nm node is shown.
Similar content being viewed by others
References
Colinge JP (2008) FinFETs and other multi-gate transistors. Springer, New York
Fossem Jerry G, Trivedi Vishal P (2013) Ultra-thin-body MOSFETs and FinFETs. Cambridge University Press, UK
Lundstrom M, Guo J (2006) Nanoscale transistor device physics. modeling and simulation. Springer, USA
Manoj CR, Ramgopal Rao V (2007) Impact of High-k gate dielectrics on the device and circuit performance of nanoscale FinFETs. IEEE Electron Device Lett 28(4):295–297
ITRS (2013a) Modeling and simulation, International Technology Roadmap for Semiconductors 2013 Edition
ITRS (2013b) Process integration, devices, and structures, International Technology Roadmap for Semiconductors 2013 Edition
Seoane N et al (2014) Random dopant, line-edge roughness, and gate work function variability in a nano InGaAs FinFET. IEEE Trans Electron Devices 61(2):466–472
Shulaker MM, Hills G, Patel N, Wei H, Chen H-Yu, Philip Wong H-S, Mitra S (2013) Carbon nanotube computer. Nature 501:526
Swahn B, Hassoun S (2006) Gate sizing: FinFETs vs 32 nm bulk MOSFETs. DAC, San Francisco
Usmani FA, Hasan M (2010) Carbon nanotube field effect transistors for high performance analog applications: an optimum design approach. Elsevier Microelectron J 41:395–402
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
About this article
Cite this article
Hajare, R., Lakshminarayana, C., Raghunandan, G.H. et al. Performance enhancement of FINFET and CNTFET at different node technologies. Microsyst Technol 22, 1121–1126 (2016). https://doi.org/10.1007/s00542-015-2468-9
Received:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s00542-015-2468-9