Abstract
Selective copper CVD technique involving hydrogen reduction of hexafluoro acetylacetonate copper has been used to fill vias for fabricating double-level copper interconnect structure. The surface morphology of selectively deposited copper on copper substrate of the via bottom depends strongly on via opening process. A two-step via opening process consisting of an reactive ion etching of the insulating interlayer and a wet removal of the interlayer metal results in smooth copper plug formation by CVD. Double-level copper interconnect structures have been fabricated using this technique and a via resistance as low as 100 mΩ has been obtained for a 1 μ diameter via.
Similar content being viewed by others
References
C. K. Hu, S. Chang, M. B. Small and J. E. Lewis, IEEE VLSI Multilevel Interconnection Conf., p. 181, Santa Crala, 1986.
K. Hoshino, H. Yagi, and H. Tsuchikawa, IEEE Multilevel Interconnection Conf., p. 226, Santa Crala, 1989.
P. L. Lin, C. H. Ting, 1989 Electrochem. Soc. Mtg., p. 305.
F. A. Houle, C. R. Jones, T. Baum, C. Pico and C. A. Kovac Appl. Phys. Lett.46, 204 (1985).
C. Oehr and H. Suhr, Appl. Phys. A45, 151 (1988).
D. Temple and A. Reisman, J. Electrochem. Soc.136, 3525 (1989).
N. Awaya, Y. Arita, 1989 Symp. on VLSI Techn.: Digest of Techn. Papers, Kyoto, Japan, p. 103.
Y. Arita, N. Awaya, T. Amazawa and T. Matsuda, Techn. Digest of 1989 IEDM, p. 893.
A. E. Kaloyeros, A. Feng, J. Garhart, K. C. Brooks and F. Luehrs, J. Electron. Mater.19, 271 (1990).
D. B. Beach, F. K. Legoues and C. K. Hu, Chem. Mater.2, 219 (1990).
K. Ohno, M. Sato and Y. Arita, Jpn. J. Appl. Phys.28, L 1070 (1989).
M. Maeda and H. Nakamura, J. Appl. Phys.52, 6651 (1981).
Author information
Authors and Affiliations
Rights and permissions
About this article
Cite this article
Awaya, N., Arita, Y. Double-level copper interconnections using selective copper CVD. J. Electron. Mater. 21, 959–964 (1992). https://doi.org/10.1007/BF02684203
Received:
Issue Date:
DOI: https://doi.org/10.1007/BF02684203