Skip to main content

Breaking the Size Barrier: Universal Circuits Meet Lookup Tables

  • Conference paper
  • First Online:
Advances in Cryptology – ASIACRYPT 2023 (ASIACRYPT 2023)

Abstract

A Universal Circuit (UC) is a Boolean circuit of size \(\varTheta (n \log n)\) that can simulate any Boolean function up to a certain size n. Valiant (STOC’76) provided the first two UC constructions of asymptotic sizes \(\sim 5 n\log n\) and \(\sim 4.75 n\log n\), and today’s most efficient construction of Liu et al. (CRYPTO’21) has size \(\sim 3n\log n\). Evaluating a public UC with a secure Multi-Party Computation (MPC) protocol allows efficient Private Function Evaluation (PFE), where a private function is evaluated on private data.

Previously, most UC constructions have only been developed for circuits consisting of 2-input gates. In this work, we generalize UCs to simulate circuits consisting of (\(\rho \) \(\rightarrow \) \(\omega \))-Lookup Tables (LUTs) that map \(\rho \) input bits to \(\omega \) output bits. Our LUT-based UC (LUC) construction has an asymptotic size of \(1.5\rho \omega n \log \omega n\) and improves the size of the UC over the best previous UC construction of Liu et al. (CRYPTO’21) by factors 1.12\(\times \)\(2.18\times \) for common functions. Our results show that the greatest size improvement is achieved for \(\rho =3\) inputs, and it decreases for \(\rho >3\).

Furthermore, we introduce Varying Universal Circuits (VUCs), which reduce circuit size at the expense of leaking the number of inputs \(\rho \) and outputs \(\omega \) of each LUT. Our benchmarks demonstrate that VUCs can improve over the size of the LUC construction by a factor of up to \(1.45\times \).

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 59.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 79.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Notes

  1. 1.

    UC-based PFE, unlike PFE based on Fully Homomorphic Encryption (FHE) [19, 32], relies primarily on symmetric encryption and involves far less computation.

  2. 2.

    Our code is published under the MIT license at: https://encrypto.de/code/LUC.

  3. 3.

    Note that a Universal Circuit can also compute circuits with less than the specified number of inputs, gates, and outputs by using dummy values with no functionality.

  4. 4.

    In Yao’s garbled circuit protocol [54], the UC’s universal gates can be implemented as garbled tables when the function holder takes over the garbling part.

  5. 5.

    We distinguish between EUGs and nested EUGs as the recursively constructed nested EUGs differ from its first EUG in Liu et al.’s construction [37].

  6. 6.

    An alternative would be to decompose the larger LUTs into multiple smaller ones using Shannon expansion [49].

  7. 7.

    \(\mathbbm {1}\) denotes the vector where each entry is 1.

References

  1. Intel Quartus Prime Software. https://www.intel.com/content/www/us/en/products/details/fpga/development-tools/quartus-prime.html

  2. Verilog to Routing. https://verilogtorouting.org/

  3. Vivado 2023.1 - Logic Synthesis. https://www.xilinx.com/support/documentation-navigation/design-hubs/dh0018-vivado-synthesis-hub.html

  4. XST Synthesis. https://www.xilinx.com/products/design-tools/xst.html

  5. Synopsys Inc., Design Compiler (2010). http://www.synopsys.com/Tools/Implementation/RTLSynthesis/DesignCompiler

  6. Abadi, M., Feigenbaum, J.: Secure circuit evaluation. JoC (1990)

    Google Scholar 

  7. Alhassan, M.Y., Günther, D., Kiss, Á., Schneider, T.: Efficient and Scalable Universal Circuits. JoC (2020)

    Google Scholar 

  8. Attrapadung, N.: Fully Secure and Succinct Attribute Based Encryption for Circuits from Multi-linear Maps. Cryptology ePrint Archive, Report 2014/772 (2016)

    Google Scholar 

  9. Barni, M., Failla, P., Kolesnikov, V., Lazzeretti, R., Sadeghi, A.-R., Schneider, T.: Secure evaluation of private linear branching programs with medical applications. In: Backes, M., Ning, P. (eds.) ESORICS 2009. LNCS, vol. 5789, pp. 424–439. Springer, Heidelberg (2009). https://doi.org/10.1007/978-3-642-04444-1_26

    Chapter  Google Scholar 

  10. Berkeley Logic Synthesis and Verification Group: ABC: A system for sequential synthesis and verification. http://www.eecs.berkeley.edu/alanmi/abc/

  11. Bhandari, J., et al.: Not All Fabrics Are Created Equal: Exploring eFPGA Parameters For IP Redaction. CoRR: abs/2111.04222 (2021)

    Google Scholar 

  12. Brüggemann, A., Hundt, R., Schneider, T., Suresh, A., Yalame, H.: FLUTE: fast and secure lookup table evaluations. In: S &P (2023)

    Google Scholar 

  13. Demmler, D., Schneider, T., Zohner, M.: ABY - a framework for efficient mixed-protocol secure two-party computation. In: NDSS (2015)

    Google Scholar 

  14. Dessouky, G., Koushanfar, F., Sadeghi, A., Schneider, T., Zeitouni, S., Zohner, M.: Pushing the communication barrier in secure computation using lookup tables. In: NDSS (2017)

    Google Scholar 

  15. Disser, Y., Günther, D., Schneider, T., Stillger, M., Wigandt, A., Yalame, H.: Breaking the Size Barrier: Universal Circuits meet Lookup Tables. Cryptology ePrint Archive, Report 2022/1652 (2022)

    Google Scholar 

  16. Fiore, D., Gennaro, R., Pastro, V.: Efficiently verifiable computation on encrypted data. In: CCS (2014)

    Google Scholar 

  17. Frikken, K.B., Atallah, M.J., Zhang, C.: Privacy-preserving credit checking. In: ACM Conference on Electronic Commerce (2005)

    Google Scholar 

  18. Garg, S., Gentry, C., Halevi, S., Sahai, A., Waters, B.: Attribute-based encryption for circuits from multilinear maps. In: Canetti, R., Garay, J.A. (eds.) CRYPTO 2013. LNCS, vol. 8043, pp. 479–499. Springer, Heidelberg (2013). https://doi.org/10.1007/978-3-642-40084-1_27

    Chapter  Google Scholar 

  19. Gentry, C., Halevi, S., Vaikuntanathan, V.: i-hop homomorphic encryption and rerandomizable yao circuits. In: Rabin, T. (ed.) CRYPTO 2010. LNCS, vol. 6223, pp. 155–172. Springer, Heidelberg (2010). https://doi.org/10.1007/978-3-642-14623-7_9

    Chapter  Google Scholar 

  20. Goldreich, O., Micali, S., Wigderson, A.: How to play any mental game or a completeness theorem for protocols with honest majority. In: STOC (1987)

    Google Scholar 

  21. Günther, D., Kiss, Á., Scheidel, L., Schneider, T.: Poster: framework for semi-private function evaluation with application to secure insurance rate calculation. In: CCS (2019)

    Google Scholar 

  22. Günther, D., Kiss, Á., Schneider, T.: More efficient universal circuit constructions. In: Takagi, T., Peyrin, T. (eds.) ASIACRYPT 2017. LNCS, vol. 10625, pp. 443–470. Springer, Cham (2017). https://doi.org/10.1007/978-3-319-70697-9_16

    Chapter  Google Scholar 

  23. Henecka, W., Kögl, S., Sadeghi, A., Schneider, T., Wehrenberg, I.: TASTY: Tool for Automating Secure Two-Party Computations. In: CCS (2010)

    Google Scholar 

  24. Holz, M., Kiss, Á., Rathee, D., Schneider, T.: Linear-complexity private function evaluation is practical. In: Chen, L., Li, N., Liang, K., Schneider, S. (eds.) ESORICS 2020. LNCS, vol. 12309, pp. 401–420. Springer, Cham (2020). https://doi.org/10.1007/978-3-030-59013-0_20

    Chapter  Google Scholar 

  25. Ji, K., Zhang, B., Lu, T., Ren, K.: Multi-party private function evaluation for RAM. IEEE Trans. Inf. Forensics Secur. 18, 1252–1267 (2023)

    Article  Google Scholar 

  26. Kamali, H.M., Azar, K.Z., Gaj, K., Homayoun, H., Sasan, A.: LUT-lock: a novel LUT-based logic obfuscation for FPGA-bitstream and ASIC-hardware protection. In: ISVLSI (2018)

    Google Scholar 

  27. Kamara, S., Raykova, M.: Secure outsourced computation in a multi-tenant cloud. In: IBM Workshop on Cryptography and Security in Clouds (2011)

    Google Scholar 

  28. Karatsuba, A.A., Ofman, Y.P.: Multiplication of many-digital numbers by automatic computers. In: SSSR Academy of Sciences (1962)

    Google Scholar 

  29. Karnaugh, M.: The map method for synthesis of combinational logic circuits. Trans. Am. Inst. Electrical Eng. 72, 593–599 (1953)

    MathSciNet  Google Scholar 

  30. Katz, J., Malka, L.: Constant-round private function evaluation with linear complexity. In: Lee, D.H., Wang, X. (eds.) ASIACRYPT 2011. LNCS, vol. 7073, pp. 556–571. Springer, Heidelberg (2011). https://doi.org/10.1007/978-3-642-25385-0_30

    Chapter  Google Scholar 

  31. Kiss, Á., Schneider, T.: Valiant’s universal circuit is practical. In: Fischlin, M., Coron, J.-S. (eds.) EUROCRYPT 2016. LNCS, vol. 9665, pp. 699–728. Springer, Heidelberg (2016). https://doi.org/10.1007/978-3-662-49890-3_27

    Chapter  Google Scholar 

  32. Kluczniak, K.: Circuit privacy for FHEW/TFHE-style fully homomorphic encryption in practice. Cryptology ePrint Archive, Report 2022/1459 (2022)

    Google Scholar 

  33. Kolesnikov, V., Sadeghi, A.R., Schneider, T.: Improved garbled circuit building blocks and applications to auctions and computing minima. In: CANS (2009)

    Google Scholar 

  34. Kolesnikov, V., Schneider, T.: A practical universal circuit construction and secure evaluation of private functions. In: FC (2008)

    Google Scholar 

  35. Kolesnikov, V., Schneider, T.: Improved garbled circuit: free XOR gates and applications. In: Aceto, L., Damgård, I., Goldberg, L.A., Halldórsson, M.M., Ingólfsdóttir, A., Walukiewicz, I. (eds.) ICALP 2008. LNCS, vol. 5126, pp. 486–498. Springer, Heidelberg (2008). https://doi.org/10.1007/978-3-540-70583-3_40

    Chapter  Google Scholar 

  36. Lipmaa, H., Mohassel, P., Sadeghian, S.S.: Valiant’s Universal Circuit: Improvements, Implementation, and Applications. Cryptology ePrint Archive, Report 2016/017 (2016)

    Google Scholar 

  37. Liu, H., Yu, Yu., Zhao, S., Zhang, J., Liu, W., Hu, Z.: Pushing the limits of valiant’s universal circuits: simpler, tighter and more compact. In: Malkin, T., Peikert, C. (eds.) CRYPTO 2021. LNCS, vol. 12826, pp. 365–394. Springer, Cham (2021). https://doi.org/10.1007/978-3-030-84245-1_13

    Chapter  Google Scholar 

  38. Liu, Y., Wang, Q., Yiu, S.: Making private function evaluation safer, faster, and simpler. In: Hanaoka, G., Shikata, J., Watanabe, Y. (eds.) PKC 2022. LNCS, vol. 13177, pp. 349–378. Springer, Cham (2022). https://doi.org/10.1007/978-3-030-97121-2_13

    Chapter  Google Scholar 

  39. Malkhi, D., Nisan, N., Pinkas, B., Sella, Y.: Fairplay - secure two-party computation system. In: USENIX Security (2004)

    Google Scholar 

  40. Masserova, E., Garg, D., Mai, K., Pileggi, L., Goyal, V., Parno, B.: Logic Locking-Connecting Theory and Practice. Cryptology ePrint Archive, Report 2022/545 (2022)

    Google Scholar 

  41. Patra, A., Schneider, T., Suresh, A., Yalame, H.: ABY2.0: improved mixed-protocol secure two-party computation. In: USENIX Security (2021)

    Google Scholar 

  42. Patra, A., Schneider, T., Suresh, A., Yalame, H.: SynCirc: efficient synthesis of depth-optimized circuits for secure computation. In: HOST (2021)

    Google Scholar 

  43. Paus, A., Sadeghi, A.-R., Schneider, T.: Practical secure evaluation of semi-private functions. In: Abdalla, M., Pointcheval, D., Fouque, P.-A., Vergnaud, D. (eds.) ACNS 2009. LNCS, vol. 5536, pp. 89–106. Springer, Heidelberg (2009). https://doi.org/10.1007/978-3-642-01957-9_6

    Chapter  Google Scholar 

  44. Pinkas, B., Schneider, T., Smart, N.P., Williams, S.C.: Secure two-party computation is practical. In: Matsui, M. (ed.) ASIACRYPT 2009. LNCS, vol. 5912, pp. 250–267. Springer, Heidelberg (2009). https://doi.org/10.1007/978-3-642-10366-7_15

    Chapter  Google Scholar 

  45. Pohle, E., Abidin, A., Preneel, B.: Poster: fast evaluation of S-boxes in MPC. In: NDSS (2022)

    Google Scholar 

  46. Quine, W.V.: The problem of simplifying truth functions. The American Mathematical Monthly (1952)

    Google Scholar 

  47. Rosulek, M., Roy, L.: Three halves make a whole? Beating the half-gates lower bound for garbled circuits. In: Malkin, T., Peikert, C. (eds.) CRYPTO 2021. LNCS, vol. 12825, pp. 94–124. Springer, Cham (2021). https://doi.org/10.1007/978-3-030-84242-0_5

    Chapter  Google Scholar 

  48. Sadeghi, A.R., Schneider, T.: Generalized universal circuits for secure evaluation of private functions with application to data classification. In: ICISC (2008)

    Google Scholar 

  49. Shannon, C.E.: The synthesis of two-terminal switching circuits. Bell Syst. Tech. J. 28, 59–98 (1949)

    Article  MathSciNet  Google Scholar 

  50. Smart, N., Tillich, S.: Bristol Fashion MPC circuits. https://homes.esat.kuleuven.be/nsmart/MPC/old-circuits.html

  51. Valiant, L.G.: Universal Circuits (Preliminary Report). In: STOC (1976)

    Google Scholar 

  52. Wegener, I.: The Complexity of Boolean Functions. Wiley, New York (1987)

    Google Scholar 

  53. Wolf, C., Glaser, J., Kepler, J.: Yosys - a free Verilog synthesis suite. In: Austrian Workshop on Microelectronics (2013)

    Google Scholar 

  54. Yao, A.C.: How to generate and exchange secrets (Extended Abstract). In: FOCS (1986)

    Google Scholar 

  55. Yasin, M., Sengupta, A., Nabeel, M.T., Ashraf, M., Rajendran, J., Sinanoglu, O.: Provably-secure logic locking: from theory to practice. In: CCS (2017)

    Google Scholar 

  56. Zahur, S., Rosulek, M., Evans, D.: Two halves make a whole - reducing data transfer in garbled circuits using half gates. In: Oswald, E., Fischlin, M. (eds.) EUROCRYPT 2015. LNCS, vol. 9057, pp. 220–250. Springer, Heidelberg (2015). https://doi.org/10.1007/978-3-662-46803-6_8

    Chapter  Google Scholar 

  57. Zhao, S., Yu, Yu., Zhang, J., Liu, H.: Valiant’s universal circuits revisited: an overall improvement and a lower bound. In: Galbraith, S.D., Moriai, S. (eds.) ASIACRYPT 2019. LNCS, vol. 11921, pp. 401–425. Springer, Cham (2019). https://doi.org/10.1007/978-3-030-34578-5_15

    Chapter  Google Scholar 

  58. Zimmerman, J.: How to obfuscate programs directly. In: Oswald, E., Fischlin, M. (eds.) EUROCRYPT 2015. LNCS, vol. 9057, pp. 439–467. Springer, Heidelberg (2015). https://doi.org/10.1007/978-3-662-46803-6_15

    Chapter  Google Scholar 

Download references

Acknowledgements

This project received funding from the ERC under the European Union’s Horizon 2020 research and innovation program (grant agreement No. 850990 PSOTI). It was co-funded by the DFG within SFB 1119 CROSSING/236615297 and GRK 2050 Privacy & Trust/251805230.

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Daniel Günther .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2023 International Association for Cryptologic Research

About this paper

Check for updates. Verify currency and authenticity via CrossMark

Cite this paper

Disser, Y., Günther, D., Schneider, T., Stillger, M., Wigandt, A., Yalame, H. (2023). Breaking the Size Barrier: Universal Circuits Meet Lookup Tables. In: Guo, J., Steinfeld, R. (eds) Advances in Cryptology – ASIACRYPT 2023. ASIACRYPT 2023. Lecture Notes in Computer Science, vol 14438. Springer, Singapore. https://doi.org/10.1007/978-981-99-8721-4_1

Download citation

  • DOI: https://doi.org/10.1007/978-981-99-8721-4_1

  • Published:

  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-99-8720-7

  • Online ISBN: 978-981-99-8721-4

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics