Impact of Gate Thickness Variation and Dielectric on the Performance of Vertical Organic Thin Film Transistor

Abstract

This research paper emphasizes on the impact of gate thickness variation and gate dielectric on the performance of an organic static induction-type vertical organic thin film transistor (VOTFT). The electrical behavior of VOTFT is analyzed and performance parameters extraction is carried out using Atlas 2-D numerical device simulator. VOTFTs have high-speed operation in comparison to conventional organic thin film transistor (OTFT) due to shorter channel length that corresponds to thickness of organic semiconductor (OSC) layer. Majority carrier flow from source to drain is controlled by varying gate voltage (V _G) applied to Schottky gate electrode. Effect of gate thickness variation is analyzed by varying gate thickness of device from 10 to 50 µm with a step size of 20 µm. Pentacene is used as OSC channel material. A device having additional thin layers of Al₂O₃ dielectric above and below buried grid-type gate electrode has also been analyzed. The results obtained demonstrate that with 80 % reduction in gate electrode thickness, ${{I_{\text{on}} } \mathord{\left/ {\vphantom {{I_{\text{on}} } {I_{\text{off}} }}} \right. \kern-0pt} {I_{\text{off}} }}$ ratio increases by 48 %. This analysis shows control of drive current (I _DS) with gate electrode thickness variation. Device having gate dielectric layers has shown very low off current of 7.01 × 10⁻⁹ A that can be attributed to reduction in leakage between gate and source due to use of gate dielectric.