Temperature Dependent Thermal Conductivities of CMOS Layers by Micromachined Thermal van der Pauw Test Structures

Summary

We report in-plane thermal conductivities of five different layer sandwiches and two thin films of an ASIC CMOS process between 100 and 420 K. The data were acquired using micromachined thermal test structures based on the thermal van der Pauw method. This attractive method exploits the analogy between the two-dimensional heat flow in thin film samples and the electrical current flow in thin film conductors. Among other data, thermal conductivities of the silicon nitride passivation, a thermal silicon oxide, and a PECVD silicon oxide were found to be κ= 1.28±0.01 Wm⁻¹K⁻¹, κ = 1.5±0.1 Wm⁻¹K⁻¹, and K = 0.93±0.04 Wm⁻¹K⁻¹, respectively, at 300 K.