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Comparative Study of Crosstalk Reduction Techniques for Parallel Microstriplines

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Abstract

Reduction of crosstalk among interconnects and PCB traces to a tolerable level are an important goal in circuit design. This paper present the comparative study of crosstalk reduction techniques for parallel microstriplines. Parallel microstrip line is treated as a symmetrical network with four ports Here the affection of the guard trace with vias and serpentine trace with vias to the function of the parallel microstriplines. are analyzed and simulated in terms of S parameters From the S parameters the effect of guard trace is analyzed. Simulation results are presented in terms of coupling strength.

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References

  1. Lee, K., Jung, H.-K., Chi, H., Kwon, H.J., Sim, J.-Y., Park, H.J.: Serpentine Microstrip Lines with Zero Far End Crossstalk for Parallel High Speed DRAM Interfaces. Proceedings of the IEEE 33(2), 552–558 (2010)

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  2. Lee, K., Lee, H.B., Jung, H.-K., Sim, J.Y., Park, H.J.: A Serpentine Guard Trace to Reduce the Far End Crosstalk Voltage and the Crosstalk Induced Timing Jitter of Parallel MicrostripLines. Proceedings of the IEEE 31(4), 809–817 (2008)

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  3. Sohn, Y.S., Lee, J.C., Park, H.J.: Empirical equations on electrical parameters of coupled microstrip lines for crosstalk estimation in printed circuit board. IEEE Trans. Adv. Packag. 24(4), 521–527 (2001)

    Article  Google Scholar 

  4. Li, Z., Wang, Q., Shi, C.: Application of Guard Traces with Vias in the RF PCB Layout. Proceedings of the IEEE (2002)

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  5. Lee, K., Lee, H.-B., Jung, H.-K., Sim, J.-Y., Park, H.-J.: Serpentine guard trace to reduce far-end crosstalk and even-odd mode velocity mismatch of microstrip lines by more than 40%. In: Electron. Compon. Technol. Conf., Reno, NV, pp. 329–332 (2007)

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  6. Lee, H.-B., Lee, K., Jung, H.-K., Park, H.-J.: Extraction of LRGCmatrices For 8-coupled uniform lossy transmission lines using 2-port VNA measurements. IEICE Trans. Electron.  E89-C(3), 410–419 (2006)

    Google Scholar 

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© 2012 ICST Institute for Computer Science, Social Informatics and Telecommunications Engineering

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Rajeswari, P., Raju, S. (2012). Comparative Study of Crosstalk Reduction Techniques for Parallel Microstriplines. In: Das, V.V., Stephen, J. (eds) Advances in Communication, Network, and Computing. CNC 2012. Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, vol 108. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-35615-5_68

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  • DOI: https://doi.org/10.1007/978-3-642-35615-5_68

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-35614-8

  • Online ISBN: 978-3-642-35615-5

  • eBook Packages: Computer ScienceComputer Science (R0)

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