Abstract
This paper deals with the architecture, the performances and the scalability of a reconfigurable Multi-Core Crypto-Processor (MCCP) especially designed to secure multi-channel and multi-standard communication systems. A classical mono-core approach either provides limited throughput or does not allow simple management of multi-standard streams. In contrast, parallel architecture of the MCCP provides either high encryption data rate or simultaneous use of different ciphers. Up to eight cores can be used at the same time to reach a maximum throughput of 3460 Mbps. Moreover, our architecture targets FPGA platforms to enable its evolution over the time by using hardware reconfiguration.
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Grand, M., Bossuet, L., Le Gal, B., Gogniat, G., Dallet, D. (2011). Design and Implementation of a Multi-Core Crypto-Processor for Software Defined Radios. In: Koch, A., Krishnamurthy, R., McAllister, J., Woods, R., El-Ghazawi, T. (eds) Reconfigurable Computing: Architectures, Tools and Applications. ARC 2011. Lecture Notes in Computer Science, vol 6578. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-19475-7_5
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DOI: https://doi.org/10.1007/978-3-642-19475-7_5
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