Abstract
A Reconfigurable Interconnection Network (RIN) is a custom designed on-chip switching network yielding routing solutions for a pre-given set of applications. Like FPGA routing networks, the RIN is used to make reconfigurable interconnections among functional blocks. Unlike FPGAs, the network topology of a RIN is irregular as it is designed for a given set of routing requirements and optimized for area, power and delay minimizations. In this paper, we propose an automatic design scheme for RINs, including routing specification formulation, graph modelings, network topology designs, routing algorithms, and MUX-based network circuit implementation. A CAD tool is developed based on the design scheme, which takes a set of routing requirements as input and produces the corresponding RIN network topology and network circuit in HDL format. We present the area costs of various RINs generated by the CAD tool with Altera’s Quartus II, and illustrate the RIN design scheme with a reconfigurable multi-stream video system prototype.
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Fan, H., Wu, YL., Cheung, CC. (2010). Design Automation for Reconfigurable Interconnection Networks. In: Sirisuk, P., Morgan, F., El-Ghazawi, T., Amano, H. (eds) Reconfigurable Computing: Architectures, Tools and Applications. ARC 2010. Lecture Notes in Computer Science, vol 5992. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-12133-3_23
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DOI: https://doi.org/10.1007/978-3-642-12133-3_23
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