Abstract
In this paper methods of designing of a class of highly reliable digital circuit - Totally Self Checking Sequential Machines are presented. The main problem in TSC sequential machines (TSC SM) designing is synthesis TSC functional excitation circuit. Formal condition of ST property for both AND-OR and AND-AND-OR structures are presented. The description of design methodology of TSC SM is presented. Owing to our methods we can design TSC circuits in a fully automatic way.
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Greblicki, J., Kotowski, J. (2009). Automated Design of Totally Self-Checking Sequential Circuits. In: Moreno-Díaz, R., Pichler, F., Quesada-Arencibia, A. (eds) Computer Aided Systems Theory - EUROCAST 2009. EUROCAST 2009. Lecture Notes in Computer Science, vol 5717. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-04772-5_14
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DOI: https://doi.org/10.1007/978-3-642-04772-5_14
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-04771-8
Online ISBN: 978-3-642-04772-5
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