Abstract
In this paper a novel architecture for an integrated NMR receiver front-end for surgical guidance applications is described. While the chip consumes only 9 mA supply current from a 3.3 V power supply it has a measured input referred noise density of 0.7 nV/√Hz. The receiver consists of the reception coil, an on-chip tuning capacitor an LNA and a 50Ω output buffer. The system is designedfor operation in a B0-field of 1.5 T corresponding to a frequency of 63MHz. It is implemented in a 0.35 μm CMOS high voltage process and occupies a chip area of 500 μm x 760 μm.
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© 2009 International Federation of Medical and Biological Engineering
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Anders, J., Reymond, S., Boero, G., Scheffler, K. (2009). A Low-Noise CMOS Receiver Frontend for NMR-based Surgical Guidance. In: Lim, C.T., Goh, J.C.H. (eds) 13th International Conference on Biomedical Engineering. IFMBE Proceedings, vol 23. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-92841-6_22
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DOI: https://doi.org/10.1007/978-3-540-92841-6_22
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-92840-9
Online ISBN: 978-3-540-92841-6
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