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An Intrusive Dynamic Reconfigurable Cycle-Accurate Debugging System for Embedded Processors

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Applied Reconfigurable Computing. Architectures, Tools, and Applications (ARC 2018)

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Abstract

This paper presents a dynamic partial reconfigurable debugging system for embedded processors based upon a device start and stop (DSAS) approach [1]. Using this approach, a cycle-accurate debugging system can be dynamically configured to any embedded processor-based design at runtime. The debugging system offers lossless debugging because the design is stopped during data transfer to prevent the loss of data. The data can be transferred by any available data communication interface such as Ethernet or UART and can be viewed by open-source waveform viewers. The technique offers debugging without the need to re-synthesize the design by using the dynamic partial reconfiguration.

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Acknowledgements

This work is funded by German Research Foundation (DFG) via project SFB/TRR 196 “MARIE” through project S05.

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Correspondence to Habib ul Hasan Khan .

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Khan, H.u.H., Kamal, A., Goehringer, D. (2018). An Intrusive Dynamic Reconfigurable Cycle-Accurate Debugging System for Embedded Processors. In: Voros, N., Huebner, M., Keramidas, G., Goehringer, D., Antonopoulos, C., Diniz, P. (eds) Applied Reconfigurable Computing. Architectures, Tools, and Applications. ARC 2018. Lecture Notes in Computer Science(), vol 10824. Springer, Cham. https://doi.org/10.1007/978-3-319-78890-6_35

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  • DOI: https://doi.org/10.1007/978-3-319-78890-6_35

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  • Online ISBN: 978-3-319-78890-6

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