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Novel Designs for Memory Checkers Using Semantics and Digital Sequential Circuits

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Book cover Computational Science and Its Applications -- ICCSA 2015 (ICCSA 2015)

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Abstract

Memory safety breaches have been main tools in many of the latest security vulnerabilities. Therefore memory safety is critical and attractive property for any piece of code. Separation logic can be realized as a mathematical tool to reason about memory safety of programs. An important technique for modern parallel programming is multithreading. For a multi-threaded model of programming (Core-Par-C), this paper introduces an accurate semantics which is employed to mathematically prove the undecidability of memory-safety of Core-Par-C programs. The paper also proposes a design for a hardware to act as an efficient memory checker against memory errors.

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Correspondence to Mohamed A. El-Zawawy .

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El-Zawawy, M.A. (2015). Novel Designs for Memory Checkers Using Semantics and Digital Sequential Circuits. In: Gervasi, O., et al. Computational Science and Its Applications -- ICCSA 2015. ICCSA 2015. Lecture Notes in Computer Science(), vol 9158. Springer, Cham. https://doi.org/10.1007/978-3-319-21410-8_46

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  • DOI: https://doi.org/10.1007/978-3-319-21410-8_46

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