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A Simulator for LLVM Bitcode

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Formal Methods for Industrial Critical Systems (FMICS 2019)

Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 11687))

Abstract

In this paper, we introduce an interactive simulator for programs in the form of LLVM bitcode. The main features of the simulator include precise control over thread scheduling, automatic checkpoints and reverse stepping, support for source-level information about functions and variables in C and C++ programs and structured heap visualisation. Additionally, the simulator is compatible with DiVM (DIVINE VM) hypercalls, which makes it possible to load, simulate and analyse counterexamples from an existing model checker.

This work has been partially supported by the Czech Science Foundation grant No. 18-02177S.

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Notes

  1. 1.

    https://divine.fi.muni.cz/2019/sim/.

  2. 2.

    How this is achieved is described in more detail in [12].

  3. 3.

    The behaviour of the program may depend on external factors, such as scheduling choices, user inputs, asynchronous events and so on.

  4. 4.

    This is often the case in verification-centric tools, partly because it is a simple implementation strategy that builds on the same primitives as the verification tool itself.

  5. 5.

    This description is necessarily incomplete, being much more concise than the real representation of the program’s state. Including additional information improves completeness, but compromises brevity, which is an important strength of this presentation format.

  6. 6.

    https://divine.fi.muni.cz/download.html.

  7. 7.

    https://divine.fi.muni.cz/manual.html.

  8. 8.

    The source code of the graphical user interface is available from the supplementary materials page at https://divine.fi.muni.cz/2019/sim/.

  9. 9.

    We speculate that this is the primary reason why interactive simulators (and debuggers in general) are so scarce.

  10. 10.

    Supported by anecdotal evidence from working with students, both individually and in a validation & verification course.

References

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Correspondence to Petr Ročkai .

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Ročkai, P., Barnat, J. (2019). A Simulator for LLVM Bitcode. In: Larsen, K., Willemse, T. (eds) Formal Methods for Industrial Critical Systems. FMICS 2019. Lecture Notes in Computer Science(), vol 11687. Springer, Cham. https://doi.org/10.1007/978-3-030-27008-7_8

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  • DOI: https://doi.org/10.1007/978-3-030-27008-7_8

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-030-27007-0

  • Online ISBN: 978-3-030-27008-7

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