Abstract
This paper describes the use of the multi-paradigm aspects of SystemC to develop hardware libraries, to reuse designs, to accelerate simulation, and to allow efficient design space exploration both at the RTL and architectural levels. Concepts of commonality and variation supported by C++ are used to compare SystemC capabilities to those of VHDL.
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Charest, L., Aboulhamid, E.M. (2003). A VHDL/SystemC Comparison in Handling Design Reuse. In: Badawy, W., Jullien, G. (eds) System-on-Chip for Real-Time Applications. The Kluwer International Series in Engineering and Computer Science, vol 711. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-0351-4_5
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DOI: https://doi.org/10.1007/978-1-4615-0351-4_5
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