Abstract
The increasing popularity of power constrained mobile computers and embedded computing applications drives the need for analyzing and optimizing power in all the components of a system. Software constitutes a major component of today’s systems, and its role is projected to grow even further. Thus, an ever increasing portion of the functionality of today’s systems is in the form of instructions, as opposed to gates. This motivates the need for analyzing power consumption from the point of view of instructions—something that traditional circuit and gate level power analysis tools are inadequate for. This paper describes an alternative, measurement based instruction level power analysis approach that provides an accurate and practical way of quantifying the power cost of software. This technique has been applied to three commercial, architecturally different processors. The salient results of these analyses are summarized. Instruction level analysis of a processor helps in the development of models for power consumption of software executing on that processor. The power models for the subject processors are described and interesting observations resulting from the comparison of these models are highlighted. The ability to evaluate software in terms of power consumption makes it feasible to search for low power implementations of given programs. In addition, it can guide the development of general tools and techniques for low power software. Several ideas in this regard as motivated by the power analysis of the subject processors are also described.
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© 1996 Kluwer Academic Publishers
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Tiwari, V., Malik, S., Wolfe, A., Lee, M.TC. (1996). Instruction Level Power Analysis and Optimization of Software. In: Chandrakasan, A.P., Brodersen, R.W. (eds) Technologies for Wireless Computing. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-1453-0_9
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DOI: https://doi.org/10.1007/978-1-4613-1453-0_9
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