Abstract
Using Boolean algebra to directly describe the combinational logic in VHDL (VHSIC (very high speed integrated circuit) Hardware Description Language) may not be a good idea for a design that has more than four inputs. When the combinational logic design has more than four inputs, the "logic" behind the design tends to become difficult for other designers to understand.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Author information
Authors and Affiliations
Rights and permissions
Copyright information
© 2017 Aiken Pang and Peter Membrey
About this chapter
Cite this chapter
Pang, A., Membrey, P. (2017). Simplifying Boolean Algebra for FPGA. In: Beginning FPGA: Programming Metal. Apress, Berkeley, CA. https://doi.org/10.1007/978-1-4302-6248-0_9
Download citation
DOI: https://doi.org/10.1007/978-1-4302-6248-0_9
Published:
Publisher Name: Apress, Berkeley, CA
Print ISBN: 978-1-4302-6247-3
Online ISBN: 978-1-4302-6248-0
eBook Packages: Professional and Applied ComputingApress Access BooksProfessional and Applied Computing (R0)